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authorRichard Henderson2016-11-16 11:48:37 +0100
committerRichard Henderson2017-01-10 17:06:11 +0100
commitb79ea941d6be8b64bdfa53bd4a1c09e72fd505a8 (patch)
tree8e385f613492a79db7482a24866e81f86512c457 /target/xtensa/translate.c
parenttarget-unicore32: Use clz opcode (diff)
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target-xtensa: Use clz opcode
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target/xtensa/translate.c')
-rw-r--r--target/xtensa/translate.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
index 0858c296ea..5c719a4181 100644
--- a/target/xtensa/translate.c
+++ b/target/xtensa/translate.c
@@ -1372,14 +1372,23 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc)
case 14: /*NSAu*/
HAS_OPTION(XTENSA_OPTION_MISC_OP_NSA);
if (gen_window_check2(dc, RRR_S, RRR_T)) {
- gen_helper_nsa(cpu_R[RRR_T], cpu_R[RRR_S]);
+ TCGv_i32 t0 = tcg_temp_new_i32();
+
+ /* if (v & 0x80000000) v = ~v; */
+ tcg_gen_sari_i32(t0, cpu_R[RRR_S], 31);
+ tcg_gen_xor_i32(t0, t0, cpu_R[RRR_S]);
+
+ /* r = (v ? clz(v) : 32) - 1; */
+ tcg_gen_clzi_i32(t0, t0, 32);
+ tcg_gen_subi_i32(cpu_R[RRR_T], t0, 1);
+ tcg_temp_free_i32(t0);
}
break;
case 15: /*NSAUu*/
HAS_OPTION(XTENSA_OPTION_MISC_OP_NSA);
if (gen_window_check2(dc, RRR_S, RRR_T)) {
- gen_helper_nsau(cpu_R[RRR_T], cpu_R[RRR_S]);
+ tcg_gen_clzi_i32(cpu_R[RRR_T], cpu_R[RRR_S], 32);
}
break;