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| author | Frank Chang | 2021-12-10 08:57:02 +0100 |
|---|---|---|
| committer | Alistair Francis | 2021-12-20 05:53:31 +0100 |
| commit | 45ca2ca6bdfbfc802fde87721ff3d164ea970d3d (patch) | |
| tree | 3893aca2492b106e08b277dc2990f0f05707da88 /target | |
| parent | target/riscv: rvv-1.0: rename vmandnot.mm and vmornot.mm to vmandn.mm and vmo... (diff) | |
| download | qemu-45ca2ca6bdfbfc802fde87721ff3d164ea970d3d.tar.gz qemu-45ca2ca6bdfbfc802fde87721ff3d164ea970d3d.tar.xz qemu-45ca2ca6bdfbfc802fde87721ff3d164ea970d3d.zip | |
target/riscv: rvv-1.0: update opivv_vadc_check() comment
Vector Integer Add-with-Carry / Subtract-with-Borrow Instructions is
moved to Section 11.4 in RVV v1.0 spec. Update the comment, no
functional changes.
Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20211210075704.23951-77-frank.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target')
| -rw-r--r-- | target/riscv/insn_trans/trans_rvv.c.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index 33ef7926e6..47eb3119cb 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -1613,7 +1613,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a) \ /* * For vadc and vsbc, an illegal instruction exception is raised if the - * destination vector register is v0 and LMUL > 1. (Section 12.4) + * destination vector register is v0 and LMUL > 1. (Section 11.4) */ static bool opivv_vadc_check(DisasContext *s, arg_rmrr *a) { |