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| author | Richard Henderson | 2018-12-18 04:35:46 +0100 |
|---|---|---|
| committer | Richard Henderson | 2019-01-28 16:03:34 +0100 |
| commit | dd0a0fcdd8848c2a18970c44a62bd8f394c2b495 (patch) | |
| tree | 5851b9d1238e4aa68b41982439fdd34e99215d75 /tcg/README | |
| parent | tcg: Add opcodes for vector saturated arithmetic (diff) | |
| download | qemu-dd0a0fcdd8848c2a18970c44a62bd8f394c2b495.tar.gz qemu-dd0a0fcdd8848c2a18970c44a62bd8f394c2b495.tar.xz qemu-dd0a0fcdd8848c2a18970c44a62bd8f394c2b495.zip | |
tcg: Add opcodes for vector minmax arithmetic
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/README')
| -rw-r--r-- | tcg/README | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/tcg/README b/tcg/README index dd9fd9c86c..603f4df659 100644 --- a/tcg/README +++ b/tcg/README @@ -554,6 +554,16 @@ E.g. VECL=1 -> 64 << 1 -> v128, and VECE=2 -> 1 << 2 -> i32. Similarly, v0 = -v1. +* smin_vec: +* umin_vec: + + Similarly, v0 = MIN(v1, v2), for signed and unsigned element types. + +* smax_vec: +* umax_vec: + + Similarly, v0 = MAX(v1, v2), for signed and unsigned element types. + * ssadd_vec: * sssub_vec: * usadd_vec: |