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| author | Richard Henderson | 2015-07-24 16:16:00 +0200 |
|---|---|---|
| committer | Richard Henderson | 2015-08-24 20:10:54 +0200 |
| commit | 609ad70562793937257c89d07bf7c1370b9fc9aa (patch) | |
| tree | fd10a7febb6cfe6934d301b2b2dc7b675bade774 /tcg/ppc | |
| parent | tcg: update README about size changing ops (diff) | |
| download | qemu-609ad70562793937257c89d07bf7c1370b9fc9aa.tar.gz qemu-609ad70562793937257c89d07bf7c1370b9fc9aa.tar.xz qemu-609ad70562793937257c89d07bf7c1370b9fc9aa.zip | |
tcg: Split trunc_shr_i32 opcode into extr[lh]_i64_i32
Rather than allow arbitrary shift+trunc, only concern ourselves
with low and high parts. This is all that was being used anyway.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/ppc')
| -rw-r--r-- | tcg/ppc/tcg-target.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h index b7e6861b79..b4f0818762 100644 --- a/tcg/ppc/tcg-target.h +++ b/tcg/ppc/tcg-target.h @@ -77,7 +77,8 @@ typedef enum { #if TCG_TARGET_REG_BITS == 64 #define TCG_TARGET_HAS_add2_i32 0 #define TCG_TARGET_HAS_sub2_i32 0 -#define TCG_TARGET_HAS_trunc_shr_i64_i32 0 +#define TCG_TARGET_HAS_extrl_i64_i32 0 +#define TCG_TARGET_HAS_extrh_i64_i32 0 #define TCG_TARGET_HAS_div_i64 1 #define TCG_TARGET_HAS_rem_i64 0 #define TCG_TARGET_HAS_rot_i64 1 |