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author | Richard Henderson | 2019-06-29 12:19:04 +0200 |
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committer | Richard Henderson | 2019-10-14 16:10:17 +0200 |
commit | 68f340d4cd9f0423039e4706a6602673d7ca9101 (patch) | |
tree | df267401fbc55e64ed1d0c19776a55a3c599e491 /tcg/ppc | |
parent | tcg/ppc: Support vector dup2 (diff) | |
download | qemu-68f340d4cd9f0423039e4706a6602673d7ca9101.tar.gz qemu-68f340d4cd9f0423039e4706a6602673d7ca9101.tar.xz qemu-68f340d4cd9f0423039e4706a6602673d7ca9101.zip |
tcg/ppc: Enable Altivec detection
Now that we have implemented the required tcg operations,
we can enable detection of host vector support.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> (PPC32)
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/ppc')
-rw-r--r-- | tcg/ppc/tcg-target.inc.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c index 8a508136ce..d739f4b605 100644 --- a/tcg/ppc/tcg-target.inc.c +++ b/tcg/ppc/tcg-target.inc.c @@ -3528,6 +3528,10 @@ static void tcg_target_init(TCGContext *s) have_isel = have_isa_2_06; #endif + if (hwcap & PPC_FEATURE_HAS_ALTIVEC) { + have_altivec = true; + } + tcg_target_available_regs[TCG_TYPE_I32] = 0xffffffff; tcg_target_available_regs[TCG_TYPE_I64] = 0xffffffff; if (have_altivec) { |