diff options
| author | Richard Henderson | 2021-12-16 20:17:46 +0100 |
|---|---|---|
| committer | Richard Henderson | 2022-03-04 19:50:41 +0100 |
| commit | ed5234735af0c9ddc120ba2297e47714c5126abd (patch) | |
| tree | aa1d8992688099dc71ccc0f28a5b52f3e7a7c022 /tcg/ppc | |
| parent | tcg: Set MAX_OPC_PARAM_IARGS to 7 (diff) | |
| download | qemu-ed5234735af0c9ddc120ba2297e47714c5126abd.tar.gz qemu-ed5234735af0c9ddc120ba2297e47714c5126abd.tar.xz qemu-ed5234735af0c9ddc120ba2297e47714c5126abd.zip | |
tcg: Add opcodes for vector nand, nor, eqv
We've had placeholders for these opcodes for a while,
and should have support on ppc, s390x and avx512 hosts.
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/ppc')
| -rw-r--r-- | tcg/ppc/tcg-target.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h index c775c97b61..3e543161eb 100644 --- a/tcg/ppc/tcg-target.h +++ b/tcg/ppc/tcg-target.h @@ -162,6 +162,9 @@ extern bool have_vsx; #define TCG_TARGET_HAS_andc_vec 1 #define TCG_TARGET_HAS_orc_vec have_isa_2_07 +#define TCG_TARGET_HAS_nand_vec 0 +#define TCG_TARGET_HAS_nor_vec 0 +#define TCG_TARGET_HAS_eqv_vec 0 #define TCG_TARGET_HAS_not_vec 1 #define TCG_TARGET_HAS_neg_vec have_isa_3_00 #define TCG_TARGET_HAS_abs_vec 0 |