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-rw-r--r--hw/intc/arm_gic.c5
-rw-r--r--hw/intc/arm_gic_common.c2
-rw-r--r--hw/intc/etraxfs_pic.c22
-rw-r--r--hw/intc/exynos4210_combiner.c23
-rw-r--r--hw/intc/exynos4210_gic.c45
-rw-r--r--hw/intc/gic_internal.h5
-rw-r--r--hw/intc/grlib_irqmp.c33
-rw-r--r--hw/intc/imx_avic.c27
-rw-r--r--hw/intc/ioapic.c2
-rw-r--r--hw/intc/lm32_pic.c27
-rw-r--r--hw/intc/omap_intc.c57
-rw-r--r--hw/intc/pl190.c78
-rw-r--r--hw/intc/puv3_intc.c23
-rw-r--r--hw/intc/realview_gic.c20
-rw-r--r--hw/intc/slavio_intctl.c35
-rw-r--r--hw/intc/xilinx_intc.c19
16 files changed, 241 insertions, 182 deletions
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
index 8e340049c3..d431b7a881 100644
--- a/hw/intc/arm_gic.c
+++ b/hw/intc/arm_gic.c
@@ -639,6 +639,7 @@ static const MemoryRegionOps gic_cpu_ops = {
void gic_init_irqs_and_distributor(GICState *s, int num_irq)
{
+ SysBusDevice *sbd = SYS_BUS_DEVICE(s);
int i;
i = s->num_irq - GIC_INTERNAL;
@@ -652,9 +653,9 @@ void gic_init_irqs_and_distributor(GICState *s, int num_irq)
if (s->revision != REV_NVIC) {
i += (GIC_INTERNAL * s->num_cpu);
}
- qdev_init_gpio_in(&s->busdev.qdev, gic_set_irq, i);
+ qdev_init_gpio_in(DEVICE(s), gic_set_irq, i);
for (i = 0; i < NUM_CPU(s); i++) {
- sysbus_init_irq(&s->busdev, &s->parent_irq[i]);
+ sysbus_init_irq(sbd, &s->parent_irq[i]);
}
memory_region_init_io(&s->iomem, OBJECT(s), &gic_dist_ops, s,
"gic_dist", 0x1000);
diff --git a/hw/intc/arm_gic_common.c b/hw/intc/arm_gic_common.c
index 08560f23a3..709b5c2984 100644
--- a/hw/intc/arm_gic_common.c
+++ b/hw/intc/arm_gic_common.c
@@ -110,7 +110,7 @@ static void arm_gic_common_realize(DeviceState *dev, Error **errp)
static void arm_gic_common_reset(DeviceState *dev)
{
- GICState *s = FROM_SYSBUS(GICState, SYS_BUS_DEVICE(dev));
+ GICState *s = ARM_GIC_COMMON(dev);
int i;
memset(s->irq_state, 0, GIC_MAXIRQ * sizeof(gic_irq_state));
for (i = 0 ; i < s->num_cpu; i++) {
diff --git a/hw/intc/etraxfs_pic.c b/hw/intc/etraxfs_pic.c
index ce3a3f6eb3..e02da533cb 100644
--- a/hw/intc/etraxfs_pic.c
+++ b/hw/intc/etraxfs_pic.c
@@ -36,9 +36,14 @@
#define R_R_GURU 4
#define R_MAX 5
+#define TYPE_ETRAX_FS_PIC "etraxfs,pic"
+#define ETRAX_FS_PIC(obj) \
+ OBJECT_CHECK(struct etrax_pic, (obj), TYPE_ETRAX_FS_PIC)
+
struct etrax_pic
{
- SysBusDevice busdev;
+ SysBusDevice parent_obj;
+
MemoryRegion mmio;
void *interrupt_vector;
qemu_irq parent_irq;
@@ -138,17 +143,18 @@ static void irq_handler(void *opaque, int irq, int level)
pic_update(fs);
}
-static int etraxfs_pic_init(SysBusDevice *dev)
+static int etraxfs_pic_init(SysBusDevice *sbd)
{
- struct etrax_pic *s = FROM_SYSBUS(typeof (*s), dev);
+ DeviceState *dev = DEVICE(sbd);
+ struct etrax_pic *s = ETRAX_FS_PIC(dev);
- qdev_init_gpio_in(&dev->qdev, irq_handler, 32);
- sysbus_init_irq(dev, &s->parent_irq);
- sysbus_init_irq(dev, &s->parent_nmi);
+ qdev_init_gpio_in(dev, irq_handler, 32);
+ sysbus_init_irq(sbd, &s->parent_irq);
+ sysbus_init_irq(sbd, &s->parent_nmi);
memory_region_init_io(&s->mmio, OBJECT(s), &pic_ops, s,
"etraxfs-pic", R_MAX * 4);
- sysbus_init_mmio(dev, &s->mmio);
+ sysbus_init_mmio(sbd, &s->mmio);
return 0;
}
@@ -167,7 +173,7 @@ static void etraxfs_pic_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo etraxfs_pic_info = {
- .name = "etraxfs,pic",
+ .name = TYPE_ETRAX_FS_PIC,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(struct etrax_pic),
.class_init = etraxfs_pic_class_init,
diff --git a/hw/intc/exynos4210_combiner.c b/hw/intc/exynos4210_combiner.c
index 3b40976827..ef5e8eb22f 100644
--- a/hw/intc/exynos4210_combiner.c
+++ b/hw/intc/exynos4210_combiner.c
@@ -56,8 +56,13 @@ typedef struct CombinerGroupState {
uint8_t src_pending; /* Pending source interrupts before masking */
} CombinerGroupState;
+#define TYPE_EXYNOS4210_COMBINER "exynos4210.combiner"
+#define EXYNOS4210_COMBINER(obj) \
+ OBJECT_CHECK(Exynos4210CombinerState, (obj), TYPE_EXYNOS4210_COMBINER)
+
typedef struct Exynos4210CombinerState {
- SysBusDevice busdev;
+ SysBusDevice parent_obj;
+
MemoryRegion iomem;
struct CombinerGroupState group[IIC_NGRP];
@@ -402,24 +407,24 @@ static const MemoryRegionOps exynos4210_combiner_ops = {
/*
* Internal Combiner initialization.
*/
-static int exynos4210_combiner_init(SysBusDevice *dev)
+static int exynos4210_combiner_init(SysBusDevice *sbd)
{
+ DeviceState *dev = DEVICE(sbd);
+ Exynos4210CombinerState *s = EXYNOS4210_COMBINER(dev);
unsigned int i;
- struct Exynos4210CombinerState *s =
- FROM_SYSBUS(struct Exynos4210CombinerState, dev);
/* Allocate general purpose input signals and connect a handler to each of
* them */
- qdev_init_gpio_in(&s->busdev.qdev, exynos4210_combiner_handler, IIC_NIRQ);
+ qdev_init_gpio_in(dev, exynos4210_combiner_handler, IIC_NIRQ);
/* Connect SysBusDev irqs to device specific irqs */
for (i = 0; i < IIC_NIRQ; i++) {
- sysbus_init_irq(dev, &s->output_irq[i]);
+ sysbus_init_irq(sbd, &s->output_irq[i]);
}
memory_region_init_io(&s->iomem, OBJECT(s), &exynos4210_combiner_ops, s,
- "exynos4210-combiner", IIC_REGION_SIZE);
- sysbus_init_mmio(dev, &s->iomem);
+ "exynos4210-combiner", IIC_REGION_SIZE);
+ sysbus_init_mmio(sbd, &s->iomem);
return 0;
}
@@ -441,7 +446,7 @@ static void exynos4210_combiner_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo exynos4210_combiner_info = {
- .name = "exynos4210.combiner",
+ .name = TYPE_EXYNOS4210_COMBINER,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(Exynos4210CombinerState),
.class_init = exynos4210_combiner_class_init,
diff --git a/hw/intc/exynos4210_gic.c b/hw/intc/exynos4210_gic.c
index 6147f04bce..5b913f786e 100644
--- a/hw/intc/exynos4210_gic.c
+++ b/hw/intc/exynos4210_gic.c
@@ -260,8 +260,13 @@ uint32_t exynos4210_get_irq(uint32_t grp, uint32_t bit)
/********* GIC part *********/
+#define TYPE_EXYNOS4210_GIC "exynos4210.gic"
+#define EXYNOS4210_GIC(obj) \
+ OBJECT_CHECK(Exynos4210GicState, (obj), TYPE_EXYNOS4210_GIC)
+
typedef struct {
- SysBusDevice busdev;
+ SysBusDevice parent_obj;
+
MemoryRegion cpu_container;
MemoryRegion dist_container;
MemoryRegion cpu_alias[EXYNOS4210_NCPUS];
@@ -276,9 +281,10 @@ static void exynos4210_gic_set_irq(void *opaque, int irq, int level)
qemu_set_irq(qdev_get_gpio_in(s->gic, irq), level);
}
-static int exynos4210_gic_init(SysBusDevice *dev)
+static int exynos4210_gic_init(SysBusDevice *sbd)
{
- Exynos4210GicState *s = FROM_SYSBUS(Exynos4210GicState, dev);
+ DeviceState *dev = DEVICE(sbd);
+ Exynos4210GicState *s = EXYNOS4210_GIC(dev);
uint32_t i;
const char cpu_prefix[] = "exynos4210-gic-alias_cpu";
const char dist_prefix[] = "exynos4210-gic-alias_dist";
@@ -293,10 +299,10 @@ static int exynos4210_gic_init(SysBusDevice *dev)
busdev = SYS_BUS_DEVICE(s->gic);
/* Pass through outbound IRQ lines from the GIC */
- sysbus_pass_irq(dev, busdev);
+ sysbus_pass_irq(sbd, busdev);
/* Pass through inbound GPIO lines to the GIC */
- qdev_init_gpio_in(&s->busdev.qdev, exynos4210_gic_set_irq,
+ qdev_init_gpio_in(dev, exynos4210_gic_set_irq,
EXYNOS4210_GIC_NIRQ - 32);
memory_region_init(&s->cpu_container, OBJECT(s), "exynos4210-cpu-container",
@@ -326,8 +332,8 @@ static int exynos4210_gic_init(SysBusDevice *dev)
EXYNOS4210_EXT_GIC_DIST_GET_OFFSET(i), &s->dist_alias[i]);
}
- sysbus_init_mmio(dev, &s->cpu_container);
- sysbus_init_mmio(dev, &s->dist_container);
+ sysbus_init_mmio(sbd, &s->cpu_container);
+ sysbus_init_mmio(sbd, &s->dist_container);
return 0;
}
@@ -347,7 +353,7 @@ static void exynos4210_gic_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo exynos4210_gic_info = {
- .name = "exynos4210.gic",
+ .name = TYPE_EXYNOS4210_GIC,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(Exynos4210GicState),
.class_init = exynos4210_gic_class_init,
@@ -366,8 +372,13 @@ type_init(exynos4210_gic_register_types)
* output sysbus IRQ line. The output IRQ level is formed as OR between all
* gpio inputs.
*/
-typedef struct {
- SysBusDevice busdev;
+
+#define TYPE_EXYNOS4210_IRQ_GATE "exynos4210.irq_gate"
+#define EXYNOS4210_IRQ_GATE(obj) \
+ OBJECT_CHECK(Exynos4210IRQGateState, (obj), TYPE_EXYNOS4210_IRQ_GATE)
+
+typedef struct Exynos4210IRQGateState {
+ SysBusDevice parent_obj;
uint32_t n_in; /* inputs amount */
uint32_t *level; /* input levels */
@@ -412,8 +423,7 @@ static void exynos4210_irq_gate_handler(void *opaque, int irq, int level)
static void exynos4210_irq_gate_reset(DeviceState *d)
{
- Exynos4210IRQGateState *s =
- DO_UPCAST(Exynos4210IRQGateState, busdev.qdev, d);
+ Exynos4210IRQGateState *s = EXYNOS4210_IRQ_GATE(d);
memset(s->level, 0, s->n_in * sizeof(*s->level));
}
@@ -421,17 +431,18 @@ static void exynos4210_irq_gate_reset(DeviceState *d)
/*
* IRQ Gate initialization.
*/
-static int exynos4210_irq_gate_init(SysBusDevice *dev)
+static int exynos4210_irq_gate_init(SysBusDevice *sbd)
{
- Exynos4210IRQGateState *s = FROM_SYSBUS(Exynos4210IRQGateState, dev);
+ DeviceState *dev = DEVICE(sbd);
+ Exynos4210IRQGateState *s = EXYNOS4210_IRQ_GATE(dev);
/* Allocate general purpose input signals and connect a handler to each of
* them */
- qdev_init_gpio_in(&s->busdev.qdev, exynos4210_irq_gate_handler, s->n_in);
+ qdev_init_gpio_in(dev, exynos4210_irq_gate_handler, s->n_in);
s->level = g_malloc0(s->n_in * sizeof(*s->level));
- sysbus_init_irq(dev, &s->out);
+ sysbus_init_irq(sbd, &s->out);
return 0;
}
@@ -448,7 +459,7 @@ static void exynos4210_irq_gate_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo exynos4210_irq_gate_info = {
- .name = "exynos4210.irq_gate",
+ .name = TYPE_EXYNOS4210_IRQ_GATE,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(Exynos4210IRQGateState),
.class_init = exynos4210_irq_gate_class_init,
diff --git a/hw/intc/gic_internal.h b/hw/intc/gic_internal.h
index 99a3bc362b..14264373fe 100644
--- a/hw/intc/gic_internal.h
+++ b/hw/intc/gic_internal.h
@@ -70,7 +70,10 @@ typedef struct gic_irq_state {
} gic_irq_state;
typedef struct GICState {
- SysBusDevice busdev;
+ /*< private >*/
+ SysBusDevice parent_obj;
+ /*< public >*/
+
qemu_irq parent_irq[NCPU];
bool enabled;
bool cpu_enabled[NCPU];
diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c
index 181f61429a..42e00bc4b8 100644
--- a/hw/intc/grlib_irqmp.c
+++ b/hw/intc/grlib_irqmp.c
@@ -45,10 +45,14 @@
#define FORCE_OFFSET 0x80
#define EXTENDED_OFFSET 0xC0
+#define TYPE_GRLIB_IRQMP "grlib,irqmp"
+#define GRLIB_IRQMP(obj) OBJECT_CHECK(IRQMP, (obj), TYPE_GRLIB_IRQMP)
+
typedef struct IRQMPState IRQMPState;
typedef struct IRQMP {
- SysBusDevice busdev;
+ SysBusDevice parent_obj;
+
MemoryRegion iomem;
void *set_pil_in;
@@ -102,19 +106,10 @@ static void grlib_irqmp_check_irqs(IRQMPState *state)
void grlib_irqmp_ack(DeviceState *dev, int intno)
{
- SysBusDevice *sdev;
- IRQMP *irqmp;
+ IRQMP *irqmp = GRLIB_IRQMP(dev);
IRQMPState *state;
uint32_t mask;
- assert(dev != NULL);
-
- sdev = SYS_BUS_DEVICE(dev);
- assert(sdev != NULL);
-
- irqmp = FROM_SYSBUS(typeof(*irqmp), sdev);
- assert(irqmp != NULL);
-
state = irqmp->state;
assert(state != NULL);
@@ -132,15 +127,10 @@ void grlib_irqmp_ack(DeviceState *dev, int intno)
void grlib_irqmp_set_irq(void *opaque, int irq, int level)
{
- IRQMP *irqmp;
+ IRQMP *irqmp = GRLIB_IRQMP(opaque);
IRQMPState *s;
int i = 0;
- assert(opaque != NULL);
-
- irqmp = FROM_SYSBUS(typeof(*irqmp), SYS_BUS_DEVICE(opaque));
- assert(irqmp != NULL);
-
s = irqmp->state;
assert(s != NULL);
assert(s->parent != NULL);
@@ -325,8 +315,7 @@ static const MemoryRegionOps grlib_irqmp_ops = {
static void grlib_irqmp_reset(DeviceState *d)
{
- IRQMP *irqmp = container_of(d, IRQMP, busdev.qdev);
- assert(irqmp != NULL);
+ IRQMP *irqmp = GRLIB_IRQMP(d);
assert(irqmp->state != NULL);
memset(irqmp->state, 0, sizeof *irqmp->state);
@@ -335,9 +324,7 @@ static void grlib_irqmp_reset(DeviceState *d)
static int grlib_irqmp_init(SysBusDevice *dev)
{
- IRQMP *irqmp = FROM_SYSBUS(typeof(*irqmp), dev);
-
- assert(irqmp != NULL);
+ IRQMP *irqmp = GRLIB_IRQMP(dev);
/* Check parameters */
if (irqmp->set_pil_in == NULL) {
@@ -371,7 +358,7 @@ static void grlib_irqmp_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo grlib_irqmp_info = {
- .name = "grlib,irqmp",
+ .name = TYPE_GRLIB_IRQMP,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(IRQMP),
.class_init = grlib_irqmp_class_init,
diff --git a/hw/intc/imx_avic.c b/hw/intc/imx_avic.c
index 75c8ffde29..fb00e910f6 100644
--- a/hw/intc/imx_avic.c
+++ b/hw/intc/imx_avic.c
@@ -55,8 +55,13 @@ do { printf("imx_avic: " fmt , ##args); } while (0)
#define PRIO_PER_WORD (sizeof(uint32_t) * 8 / 4)
#define PRIO_WORDS (IMX_AVIC_NUM_IRQS/PRIO_PER_WORD)
-typedef struct {
- SysBusDevice busdev;
+#define TYPE_IMX_AVIC "imx_avic"
+#define IMX_AVIC(obj) \
+ OBJECT_CHECK(IMXAVICState, (obj), TYPE_IMX_AVIC)
+
+typedef struct IMXAVICState {
+ SysBusDevice parent_obj;
+
MemoryRegion iomem;
uint64_t pending;
uint64_t enabled;
@@ -359,7 +364,8 @@ static const MemoryRegionOps imx_avic_ops = {
static void imx_avic_reset(DeviceState *dev)
{
- IMXAVICState *s = container_of(dev, IMXAVICState, busdev.qdev);
+ IMXAVICState *s = IMX_AVIC(dev);
+
s->pending = 0;
s->enabled = 0;
s->is_fiq = 0;
@@ -368,17 +374,18 @@ static void imx_avic_reset(DeviceState *dev)
memset(s->prio, 0, sizeof s->prio);
}
-static int imx_avic_init(SysBusDevice *dev)
+static int imx_avic_init(SysBusDevice *sbd)
{
- IMXAVICState *s = FROM_SYSBUS(IMXAVICState, dev);
+ DeviceState *dev = DEVICE(sbd);
+ IMXAVICState *s = IMX_AVIC(dev);
memory_region_init_io(&s->iomem, OBJECT(s), &imx_avic_ops, s,
"imx_avic", 0x1000);
- sysbus_init_mmio(dev, &s->iomem);
+ sysbus_init_mmio(sbd, &s->iomem);
- qdev_init_gpio_in(&dev->qdev, imx_avic_set_irq, IMX_AVIC_NUM_IRQS);
- sysbus_init_irq(dev, &s->irq);
- sysbus_init_irq(dev, &s->fiq);
+ qdev_init_gpio_in(dev, imx_avic_set_irq, IMX_AVIC_NUM_IRQS);
+ sysbus_init_irq(sbd, &s->irq);
+ sysbus_init_irq(sbd, &s->fiq);
return 0;
}
@@ -395,7 +402,7 @@ static void imx_avic_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo imx_avic_info = {
- .name = "imx_avic",
+ .name = TYPE_IMX_AVIC,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(IMXAVICState),
.class_init = imx_avic_class_init,
diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c
index 5d064fe3a6..d866e00297 100644
--- a/hw/intc/ioapic.c
+++ b/hw/intc/ioapic.c
@@ -230,7 +230,7 @@ static void ioapic_init(IOAPICCommonState *s, int instance_no)
memory_region_init_io(&s->io_memory, OBJECT(s), &ioapic_io_ops, s,
"ioapic", 0x1000);
- qdev_init_gpio_in(&s->busdev.qdev, ioapic_set_irq, IOAPIC_NUM_PINS);
+ qdev_init_gpio_in(DEVICE(s), ioapic_set_irq, IOAPIC_NUM_PINS);
ioapics[instance_no] = s;
}
diff --git a/hw/intc/lm32_pic.c b/hw/intc/lm32_pic.c
index b4e80c8d8c..32d009f678 100644
--- a/hw/intc/lm32_pic.c
+++ b/hw/intc/lm32_pic.c
@@ -26,8 +26,12 @@
#include "trace.h"
#include "hw/lm32/lm32_pic.h"
+#define TYPE_LM32_PIC "lm32-pic"
+#define LM32_PIC(obj) OBJECT_CHECK(LM32PicState, (obj), TYPE_LM32_PIC)
+
struct LM32PicState {
- SysBusDevice busdev;
+ SysBusDevice parent_obj;
+
qemu_irq parent_irq;
uint32_t im; /* interrupt mask */
uint32_t ip; /* interrupt pending */
@@ -99,7 +103,7 @@ static void irq_handler(void *opaque, int irq, int level)
void lm32_pic_set_im(DeviceState *d, uint32_t im)
{
- LM32PicState *s = container_of(d, LM32PicState, busdev.qdev);
+ LM32PicState *s = LM32_PIC(d);
trace_lm32_pic_set_im(im);
s->im = im;
@@ -109,7 +113,7 @@ void lm32_pic_set_im(DeviceState *d, uint32_t im)
void lm32_pic_set_ip(DeviceState *d, uint32_t ip)
{
- LM32PicState *s = container_of(d, LM32PicState, busdev.qdev);
+ LM32PicState *s = LM32_PIC(d);
trace_lm32_pic_set_ip(ip);
@@ -121,7 +125,7 @@ void lm32_pic_set_ip(DeviceState *d, uint32_t ip)
uint32_t lm32_pic_get_im(DeviceState *d)
{
- LM32PicState *s = container_of(d, LM32PicState, busdev.qdev);
+ LM32PicState *s = LM32_PIC(d);
trace_lm32_pic_get_im(s->im);
return s->im;
@@ -129,7 +133,7 @@ uint32_t lm32_pic_get_im(DeviceState *d)
uint32_t lm32_pic_get_ip(DeviceState *d)
{
- LM32PicState *s = container_of(d, LM32PicState, busdev.qdev);
+ LM32PicState *s = LM32_PIC(d);
trace_lm32_pic_get_ip(s->ip);
return s->ip;
@@ -137,7 +141,7 @@ uint32_t lm32_pic_get_ip(DeviceState *d)
static void pic_reset(DeviceState *d)
{
- LM32PicState *s = container_of(d, LM32PicState, busdev.qdev);
+ LM32PicState *s = LM32_PIC(d);
int i;
s->im = 0;
@@ -148,12 +152,13 @@ static void pic_reset(DeviceState *d)
}
}
-static int lm32_pic_init(SysBusDevice *dev)
+static int lm32_pic_init(SysBusDevice *sbd)
{
- LM32PicState *s = FROM_SYSBUS(typeof(*s), dev);
+ DeviceState *dev = DEVICE(sbd);
+ LM32PicState *s = LM32_PIC(dev);
- qdev_init_gpio_in(&dev->qdev, irq_handler, 32);
- sysbus_init_irq(dev, &s->parent_irq);
+ qdev_init_gpio_in(dev, irq_handler, 32);
+ sysbus_init_irq(sbd, &s->parent_irq);
pic = s;
@@ -185,7 +190,7 @@ static void lm32_pic_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo lm32_pic_info = {
- .name = "lm32-pic",
+ .name = TYPE_LM32_PIC,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(LM32PicState),
.class_init = lm32_pic_class_init,
diff --git a/hw/intc/omap_intc.c b/hw/intc/omap_intc.c
index bca8585284..7dd63da802 100644
--- a/hw/intc/omap_intc.c
+++ b/hw/intc/omap_intc.c
@@ -32,8 +32,13 @@ struct omap_intr_handler_bank_s {
unsigned char priority[32];
};
+#define TYPE_OMAP_INTC "common-omap-intc"
+#define OMAP_INTC(obj) \
+ OBJECT_CHECK(struct omap_intr_handler_s, (obj), TYPE_OMAP_INTC)
+
struct omap_intr_handler_s {
- SysBusDevice busdev;
+ SysBusDevice parent_obj;
+
qemu_irq *pins;
qemu_irq parent_intr[2];
MemoryRegion mmio;
@@ -328,8 +333,7 @@ static const MemoryRegionOps omap_inth_mem_ops = {
static void omap_inth_reset(DeviceState *dev)
{
- struct omap_intr_handler_s *s = FROM_SYSBUS(struct omap_intr_handler_s,
- SYS_BUS_DEVICE(dev));
+ struct omap_intr_handler_s *s = OMAP_INTC(dev);
int i;
for (i = 0; i < s->nbanks; ++i){
@@ -356,20 +360,21 @@ static void omap_inth_reset(DeviceState *dev)
qemu_set_irq(s->parent_intr[1], 0);
}
-static int omap_intc_init(SysBusDevice *dev)
+static int omap_intc_init(SysBusDevice *sbd)
{
- struct omap_intr_handler_s *s;
- s = FROM_SYSBUS(struct omap_intr_handler_s, dev);
+ DeviceState *dev = DEVICE(sbd);
+ struct omap_intr_handler_s *s = OMAP_INTC(dev);
+
if (!s->iclk) {
hw_error("omap-intc: clk not connected\n");
}
s->nbanks = 1;
- sysbus_init_irq(dev, &s->parent_intr[0]);
- sysbus_init_irq(dev, &s->parent_intr[1]);
- qdev_init_gpio_in(&dev->qdev, omap_set_intr, s->nbanks * 32);
+ sysbus_init_irq(sbd, &s->parent_intr[0]);
+ sysbus_init_irq(sbd, &s->parent_intr[1]);
+ qdev_init_gpio_in(dev, omap_set_intr, s->nbanks * 32);
memory_region_init_io(&s->mmio, OBJECT(s), &omap_inth_mem_ops, s,
"omap-intc", s->size);
- sysbus_init_mmio(dev, &s->mmio);
+ sysbus_init_mmio(sbd, &s->mmio);
return 0;
}
@@ -391,8 +396,7 @@ static void omap_intc_class_init(ObjectClass *klass, void *data)
static const TypeInfo omap_intc_info = {
.name = "omap-intc",
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(struct omap_intr_handler_s),
+ .parent = TYPE_OMAP_INTC,
.class_init = omap_intc_class_init,
};
@@ -500,8 +504,9 @@ static void omap2_inth_write(void *opaque, hwaddr addr,
case 0x10: /* INTC_SYSCONFIG */
s->autoidle &= 4;
s->autoidle |= (value & 1) << 2;
- if (value & 2) /* SOFTRESET */
- omap_inth_reset(&s->busdev.qdev);
+ if (value & 2) { /* SOFTRESET */
+ omap_inth_reset(DEVICE(s));
+ }
return;
case 0x48: /* INTC_CONTROL */
@@ -594,10 +599,11 @@ static const MemoryRegionOps omap2_inth_mem_ops = {
},
};
-static int omap2_intc_init(SysBusDevice *dev)
+static int omap2_intc_init(SysBusDevice *sbd)
{
- struct omap_intr_handler_s *s;
- s = FROM_SYSBUS(struct omap_intr_handler_s, dev);
+ DeviceState *dev = DEVICE(sbd);
+ struct omap_intr_handler_s *s = OMAP_INTC(dev);
+
if (!s->iclk) {
hw_error("omap2-intc: iclk not connected\n");
}
@@ -606,12 +612,12 @@ static int omap2_intc_init(SysBusDevice *dev)
}
s->level_only = 1;
s->nbanks = 3;
- sysbus_init_irq(dev, &s->parent_intr[0]);
- sysbus_init_irq(dev, &s->parent_intr[1]);
- qdev_init_gpio_in(&dev->qdev, omap_set_intr_noedge, s->nbanks * 32);
+ sysbus_init_irq(sbd, &s->parent_intr[0]);
+ sysbus_init_irq(sbd, &s->parent_intr[1]);
+ qdev_init_gpio_in(dev, omap_set_intr_noedge, s->nbanks * 32);
memory_region_init_io(&s->mmio, OBJECT(s), &omap2_inth_mem_ops, s,
"omap2-intc", 0x1000);
- sysbus_init_mmio(dev, &s->mmio);
+ sysbus_init_mmio(sbd, &s->mmio);
return 0;
}
@@ -635,13 +641,20 @@ static void omap2_intc_class_init(ObjectClass *klass, void *data)
static const TypeInfo omap2_intc_info = {
.name = "omap2-intc",
+ .parent = TYPE_OMAP_INTC,
+ .class_init = omap2_intc_class_init,
+};
+
+static const TypeInfo omap_intc_type_info = {
+ .name = TYPE_OMAP_INTC,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(struct omap_intr_handler_s),
- .class_init = omap2_intc_class_init,
+ .abstract = true,
};
static void omap_intc_register_types(void)
{
+ type_register_static(&omap_intc_type_info);
type_register_static(&omap_intc_info);
type_register_static(&omap2_intc_info);
}
diff --git a/hw/intc/pl190.c b/hw/intc/pl190.c
index fdb29d7ed5..329680da3a 100644
--- a/hw/intc/pl190.c
+++ b/hw/intc/pl190.c
@@ -15,8 +15,12 @@
#define PL190_NUM_PRIO 17
-typedef struct {
- SysBusDevice busdev;
+#define TYPE_PL190 "pl190"
+#define PL190(obj) OBJECT_CHECK(PL190State, (obj), TYPE_PL190)
+
+typedef struct PL190State {
+ SysBusDevice parent_obj;
+
MemoryRegion iomem;
uint32_t level;
uint32_t soft_level;
@@ -32,18 +36,18 @@ typedef struct {
int prev_prio[PL190_NUM_PRIO];
qemu_irq irq;
qemu_irq fiq;
-} pl190_state;
+} PL190State;
static const unsigned char pl190_id[] =
{ 0x90, 0x11, 0x04, 0x00, 0x0D, 0xf0, 0x05, 0xb1 };
-static inline uint32_t pl190_irq_level(pl190_state *s)
+static inline uint32_t pl190_irq_level(PL190State *s)
{
return (s->level | s->soft_level) & s->irq_enable & ~s->fiq_select;
}
/* Update interrupts. */
-static void pl190_update(pl190_state *s)
+static void pl190_update(PL190State *s)
{
uint32_t level = pl190_irq_level(s);
int set;
@@ -56,7 +60,7 @@ static void pl190_update(pl190_state *s)
static void pl190_set_irq(void *opaque, int irq, int level)
{
- pl190_state *s = (pl190_state *)opaque;
+ PL190State *s = (PL190State *)opaque;
if (level)
s->level |= 1u << irq;
@@ -65,7 +69,7 @@ static void pl190_set_irq(void *opaque, int irq, int level)
pl190_update(s);
}
-static void pl190_update_vectors(pl190_state *s)
+static void pl190_update_vectors(PL190State *s)
{
uint32_t mask;
int i;
@@ -88,7 +92,7 @@ static void pl190_update_vectors(pl190_state *s)
static uint64_t pl190_read(void *opaque, hwaddr offset,
unsigned size)
{
- pl190_state *s = (pl190_state *)opaque;
+ PL190State *s = (PL190State *)opaque;
int i;
if (offset >= 0xfe0 && offset < 0x1000) {
@@ -152,7 +156,7 @@ static uint64_t pl190_read(void *opaque, hwaddr offset,
static void pl190_write(void *opaque, hwaddr offset,
uint64_t val, unsigned size)
{
- pl190_state *s = (pl190_state *)opaque;
+ PL190State *s = (PL190State *)opaque;
if (offset >= 0x100 && offset < 0x140) {
s->vect_addr[(offset - 0x100) >> 2] = val;
@@ -218,29 +222,29 @@ static const MemoryRegionOps pl190_ops = {
static void pl190_reset(DeviceState *d)
{
- pl190_state *s = DO_UPCAST(pl190_state, busdev.qdev, d);
- int i;
+ PL190State *s = PL190(d);
+ int i;
- for (i = 0; i < 16; i++)
- {
- s->vect_addr[i] = 0;
- s->vect_control[i] = 0;
+ for (i = 0; i < 16; i++) {
+ s->vect_addr[i] = 0;
+ s->vect_control[i] = 0;
}
- s->vect_addr[16] = 0;
- s->prio_mask[17] = 0xffffffff;
- s->priority = PL190_NUM_PRIO;
- pl190_update_vectors(s);
+ s->vect_addr[16] = 0;
+ s->prio_mask[17] = 0xffffffff;
+ s->priority = PL190_NUM_PRIO;
+ pl190_update_vectors(s);
}
-static int pl190_init(SysBusDevice *dev)
+static int pl190_init(SysBusDevice *sbd)
{
- pl190_state *s = FROM_SYSBUS(pl190_state, dev);
+ DeviceState *dev = DEVICE(sbd);
+ PL190State *s = PL190(dev);
memory_region_init_io(&s->iomem, OBJECT(s), &pl190_ops, s, "pl190", 0x1000);
- sysbus_init_mmio(dev, &s->iomem);
- qdev_init_gpio_in(&dev->qdev, pl190_set_irq, 32);
- sysbus_init_irq(dev, &s->irq);
- sysbus_init_irq(dev, &s->fiq);
+ sysbus_init_mmio(sbd, &s->iomem);
+ qdev_init_gpio_in(dev, pl190_set_irq, 32);
+ sysbus_init_irq(sbd, &s->irq);
+ sysbus_init_irq(sbd, &s->fiq);
return 0;
}
@@ -249,16 +253,16 @@ static const VMStateDescription vmstate_pl190 = {
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
- VMSTATE_UINT32(level, pl190_state),
- VMSTATE_UINT32(soft_level, pl190_state),
- VMSTATE_UINT32(irq_enable, pl190_state),
- VMSTATE_UINT32(fiq_select, pl190_state),
- VMSTATE_UINT8_ARRAY(vect_control, pl190_state, 16),
- VMSTATE_UINT32_ARRAY(vect_addr, pl190_state, PL190_NUM_PRIO),
- VMSTATE_UINT32_ARRAY(prio_mask, pl190_state, PL190_NUM_PRIO+1),
- VMSTATE_INT32(protected, pl190_state),
- VMSTATE_INT32(priority, pl190_state),
- VMSTATE_INT32_ARRAY(prev_prio, pl190_state, PL190_NUM_PRIO),
+ VMSTATE_UINT32(level, PL190State),
+ VMSTATE_UINT32(soft_level, PL190State),
+ VMSTATE_UINT32(irq_enable, PL190State),
+ VMSTATE_UINT32(fiq_select, PL190State),
+ VMSTATE_UINT8_ARRAY(vect_control, PL190State, 16),
+ VMSTATE_UINT32_ARRAY(vect_addr, PL190State, PL190_NUM_PRIO),
+ VMSTATE_UINT32_ARRAY(prio_mask, PL190State, PL190_NUM_PRIO+1),
+ VMSTATE_INT32(protected, PL190State),
+ VMSTATE_INT32(priority, PL190State),
+ VMSTATE_INT32_ARRAY(prev_prio, PL190State, PL190_NUM_PRIO),
VMSTATE_END_OF_LIST()
}
};
@@ -275,9 +279,9 @@ static void pl190_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo pl190_info = {
- .name = "pl190",
+ .name = TYPE_PL190,
.parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(pl190_state),
+ .instance_size = sizeof(PL190State),
.class_init = pl190_class_init,
};
diff --git a/hw/intc/puv3_intc.c b/hw/intc/puv3_intc.c
index 44b66517f9..c2803d07d5 100644
--- a/hw/intc/puv3_intc.c
+++ b/hw/intc/puv3_intc.c
@@ -13,8 +13,12 @@
#undef DEBUG_PUV3
#include "hw/unicore32/puv3.h"
-typedef struct {
- SysBusDevice busdev;
+#define TYPE_PUV3_INTC "puv3_intc"
+#define PUV3_INTC(obj) OBJECT_CHECK(PUV3INTCState, (obj), TYPE_PUV3_INTC)
+
+typedef struct PUV3INTCState {
+ SysBusDevice parent_obj;
+
MemoryRegion iomem;
qemu_irq parent_irq;
@@ -96,19 +100,20 @@ static const MemoryRegionOps puv3_intc_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
-static int puv3_intc_init(SysBusDevice *dev)
+static int puv3_intc_init(SysBusDevice *sbd)
{
- PUV3INTCState *s = FROM_SYSBUS(PUV3INTCState, dev);
+ DeviceState *dev = DEVICE(sbd);
+ PUV3INTCState *s = PUV3_INTC(dev);
- qdev_init_gpio_in(&s->busdev.qdev, puv3_intc_handler, PUV3_IRQS_NR);
- sysbus_init_irq(&s->busdev, &s->parent_irq);
+ qdev_init_gpio_in(dev, puv3_intc_handler, PUV3_IRQS_NR);
+ sysbus_init_irq(sbd, &s->parent_irq);
s->reg_ICMR = 0;
s->reg_ICPR = 0;
memory_region_init_io(&s->iomem, OBJECT(s), &puv3_intc_ops, s, "puv3_intc",
- PUV3_REGS_OFFSET);
- sysbus_init_mmio(dev, &s->iomem);
+ PUV3_REGS_OFFSET);
+ sysbus_init_mmio(sbd, &s->iomem);
return 0;
}
@@ -121,7 +126,7 @@ static void puv3_intc_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo puv3_intc_info = {
- .name = "puv3_intc",
+ .name = TYPE_PUV3_INTC,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(PUV3INTCState),
.class_init = puv3_intc_class_init,
diff --git a/hw/intc/realview_gic.c b/hw/intc/realview_gic.c
index e122c2c810..ce8044780a 100644
--- a/hw/intc/realview_gic.c
+++ b/hw/intc/realview_gic.c
@@ -9,8 +9,13 @@
#include "hw/sysbus.h"
+#define TYPE_REALVIEW_GIC "realview_gic"
+#define REALVIEW_GIC(obj) \
+ OBJECT_CHECK(RealViewGICState, (obj), TYPE_REALVIEW_GIC)
+
typedef struct {
- SysBusDevice busdev;
+ SysBusDevice parent_obj;
+
DeviceState *gic;
MemoryRegion container;
} RealViewGICState;
@@ -21,9 +26,10 @@ static void realview_gic_set_irq(void *opaque, int irq, int level)
qemu_set_irq(qdev_get_gpio_in(s->gic, irq), level);
}
-static int realview_gic_init(SysBusDevice *dev)
+static int realview_gic_init(SysBusDevice *sbd)
{
- RealViewGICState *s = FROM_SYSBUS(RealViewGICState, dev);
+ DeviceState *dev = DEVICE(sbd);
+ RealViewGICState *s = REALVIEW_GIC(dev);
SysBusDevice *busdev;
/* The GICs on the RealView boards have a fixed nonconfigurable
* number of interrupt lines, so we don't need to expose this as
@@ -38,10 +44,10 @@ static int realview_gic_init(SysBusDevice *dev)
busdev = SYS_BUS_DEVICE(s->gic);
/* Pass through outbound IRQ lines from the GIC */
- sysbus_pass_irq(dev, busdev);
+ sysbus_pass_irq(sbd, busdev);
/* Pass through inbound GPIO lines to the GIC */
- qdev_init_gpio_in(&s->busdev.qdev, realview_gic_set_irq, numirq - 32);
+ qdev_init_gpio_in(dev, realview_gic_set_irq, numirq - 32);
memory_region_init(&s->container, OBJECT(s),
"realview-gic-container", 0x2000);
@@ -49,7 +55,7 @@ static int realview_gic_init(SysBusDevice *dev)
sysbus_mmio_get_region(busdev, 1));
memory_region_add_subregion(&s->container, 0x1000,
sysbus_mmio_get_region(busdev, 0));
- sysbus_init_mmio(dev, &s->container);
+ sysbus_init_mmio(sbd, &s->container);
return 0;
}
@@ -61,7 +67,7 @@ static void realview_gic_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo realview_gic_info = {
- .name = "realview_gic",
+ .name = TYPE_REALVIEW_GIC,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(RealViewGICState),
.class_init = realview_gic_class_init,
diff --git a/hw/intc/slavio_intctl.c b/hw/intc/slavio_intctl.c
index b47d0f0a9e..41a1672800 100644
--- a/hw/intc/slavio_intctl.c
+++ b/hw/intc/slavio_intctl.c
@@ -53,8 +53,13 @@ typedef struct SLAVIO_CPUINTCTLState {
uint32_t irl_out;
} SLAVIO_CPUINTCTLState;
+#define TYPE_SLAVIO_INTCTL "slavio_intctl"
+#define SLAVIO_INTCTL(obj) \
+ OBJECT_CHECK(SLAVIO_INTCTLState, (obj), TYPE_SLAVIO_INTCTL)
+
typedef struct SLAVIO_INTCTLState {
- SysBusDevice busdev;
+ SysBusDevice parent_obj;
+
MemoryRegion iomem;
#ifdef DEBUG_IRQ_COUNT
uint64_t irq_count[32];
@@ -206,12 +211,9 @@ static const MemoryRegionOps slavio_intctlm_mem_ops = {
void slavio_pic_info(Monitor *mon, DeviceState *dev)
{
- SysBusDevice *sd;
- SLAVIO_INTCTLState *s;
+ SLAVIO_INTCTLState *s = SLAVIO_INTCTL(dev);
int i;
- sd = SYS_BUS_DEVICE(dev);
- s = FROM_SYSBUS(SLAVIO_INTCTLState, sd);
for (i = 0; i < MAX_CPUS; i++) {
monitor_printf(mon, "per-cpu %d: pending 0x%08x\n", i,
s->slaves[i].intreg_pending);
@@ -225,13 +227,11 @@ void slavio_irq_info(Monitor *mon, DeviceState *dev)
#ifndef DEBUG_IRQ_COUNT
monitor_printf(mon, "irq statistic code not compiled.\n");
#else
- SysBusDevice *sd;
- SLAVIO_INTCTLState *s;
+ SLAVIO_INTCTLState *s = SLAVIO_INTCTL(dev);
int i;
int64_t count;
- sd = SYS_BUS_DEVICE(dev);
- s = FROM_SYSBUS(SLAVIO_INTCTLState, sd);
+ s = SLAVIO_INTCTL(dev);
monitor_printf(mon, "IRQ statistics:\n");
for (i = 0; i < 32; i++) {
count = s->irq_count[i];
@@ -406,7 +406,7 @@ static const VMStateDescription vmstate_intctl = {
static void slavio_intctl_reset(DeviceState *d)
{
- SLAVIO_INTCTLState *s = container_of(d, SLAVIO_INTCTLState, busdev.qdev);
+ SLAVIO_INTCTLState *s = SLAVIO_INTCTL(d);
int i;
for (i = 0; i < MAX_CPUS; i++) {
@@ -419,27 +419,28 @@ static void slavio_intctl_reset(DeviceState *d)
slavio_check_interrupts(s, 0);
}
-static int slavio_intctl_init1(SysBusDevice *dev)
+static int slavio_intctl_init1(SysBusDevice *sbd)
{
- SLAVIO_INTCTLState *s = FROM_SYSBUS(SLAVIO_INTCTLState, dev);
+ DeviceState *dev = DEVICE(sbd);
+ SLAVIO_INTCTLState *s = SLAVIO_INTCTL(dev);
unsigned int i, j;
char slave_name[45];
- qdev_init_gpio_in(&dev->qdev, slavio_set_irq_all, 32 + MAX_CPUS);
+ qdev_init_gpio_in(dev, slavio_set_irq_all, 32 + MAX_CPUS);
memory_region_init_io(&s->iomem, OBJECT(s), &slavio_intctlm_mem_ops, s,
"master-interrupt-controller", INTCTLM_SIZE);
- sysbus_init_mmio(dev, &s->iomem);
+ sysbus_init_mmio(sbd, &s->iomem);
for (i = 0; i < MAX_CPUS; i++) {
snprintf(slave_name, sizeof(slave_name),
"slave-interrupt-controller-%i", i);
for (j = 0; j < MAX_PILS; j++) {
- sysbus_init_irq(dev, &s->cpu_irqs[i][j]);
+ sysbus_init_irq(sbd, &s->cpu_irqs[i][j]);
}
memory_region_init_io(&s->slaves[i].iomem, OBJECT(s),
&slavio_intctl_mem_ops,
&s->slaves[i], slave_name, INTCTL_SIZE);
- sysbus_init_mmio(dev, &s->slaves[i].iomem);
+ sysbus_init_mmio(sbd, &s->slaves[i].iomem);
s->slaves[i].cpu = i;
s->slaves[i].master = s;
}
@@ -458,7 +459,7 @@ static void slavio_intctl_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo slavio_intctl_info = {
- .name = "slavio_intctl",
+ .name = TYPE_SLAVIO_INTCTL,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(SLAVIO_INTCTLState),
.class_init = slavio_intctl_class_init,
diff --git a/hw/intc/xilinx_intc.c b/hw/intc/xilinx_intc.c
index 25d2057d78..4a103988f3 100644
--- a/hw/intc/xilinx_intc.c
+++ b/hw/intc/xilinx_intc.c
@@ -37,9 +37,13 @@
#define R_MER 7
#define R_MAX 8
+#define TYPE_XILINX_INTC "xlnx.xps-intc"
+#define XILINX_INTC(obj) OBJECT_CHECK(struct xlx_pic, (obj), TYPE_XILINX_INTC)
+
struct xlx_pic
{
- SysBusDevice busdev;
+ SysBusDevice parent_obj;
+
MemoryRegion mmio;
qemu_irq parent_irq;
@@ -153,16 +157,17 @@ static void irq_handler(void *opaque, int irq, int level)
update_irq(p);
}
-static int xilinx_intc_init(SysBusDevice *dev)
+static int xilinx_intc_init(SysBusDevice *sbd)
{
- struct xlx_pic *p = FROM_SYSBUS(typeof (*p), dev);
+ DeviceState *dev = DEVICE(sbd);
+ struct xlx_pic *p = XILINX_INTC(dev);
- qdev_init_gpio_in(&dev->qdev, irq_handler, 32);
- sysbus_init_irq(dev, &p->parent_irq);
+ qdev_init_gpio_in(dev, irq_handler, 32);
+ sysbus_init_irq(sbd, &p->parent_irq);
memory_region_init_io(&p->mmio, OBJECT(p), &pic_ops, p, "xlnx.xps-intc",
R_MAX * 4);
- sysbus_init_mmio(dev, &p->mmio);
+ sysbus_init_mmio(sbd, &p->mmio);
return 0;
}
@@ -181,7 +186,7 @@ static void xilinx_intc_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo xilinx_intc_info = {
- .name = "xlnx.xps-intc",
+ .name = TYPE_XILINX_INTC,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(struct xlx_pic),
.class_init = xilinx_intc_class_init,
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-04-22 20:49:01 +0200