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path: root/hw/i386/intel_iommu_internal.h
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* intel-iommu: block output address in interrupt address rangeJason Wang2022-05-161-0/+4
* intel-iommu: remove VTD_FR_RESERVED_ERRJason Wang2022-05-161-5/+0Star
* intel_iommu: support snoop controlJason Wang2022-03-061-0/+1
* intel-iommu: ignore leaf SNP bit in scalable modeJason Wang2021-11-291-0/+2
* intel_iommu: Use correct shift for 256 bits qi descriptorLiu Yi L2020-07-221-1/+2
* intel_iommu: add present bit check for pasid table entriesLiu Yi L2020-01-061-0/+1
* intel_iommu: TM field should not be in reserved bitsQi, Yadong2019-11-251-3/+10
* intel_iommu: refine SL-PEs reserved fields checkingQi, Yadong2019-11-251-4/+1Star
* intel_iommu: Drop extended root fieldPeter Xu2019-04-021-1/+0Star
* intel_iommu: add scalable-mode option to make scalable mode workYi Sun2019-03-131-0/+4
* intel_iommu: add 256 bits qi_desc supportLiu, Yi L2019-03-131-1/+8
* intel_iommu: scalable mode emulationLiu, Yi L2019-03-131-2/+39
* intel_iommu: dma read/write draining supportPeter Xu2018-12-191-0/+3
* intel-iommu: Extend address width to 48 bitsPrasad Singamsetty2018-01-181-6/+3Star
* intel-iommu: Redefine macros to enable supporting 48 bit address widthPrasad Singamsetty2018-01-181-8/+26
* intel_iommu: fix iova for ptPeter Xu2017-08-011-1/+0Star
* intel_iommu: cleanup vtd_{do_}iommu_translate()Peter Xu2017-06-161-0/+1
* intel_iommu: support passthrough (PT)Peter Xu2017-05-251-0/+1
* intel_iommu: enable remote IOTLBPeter Xu2017-04-201-0/+1
* intel_iommu: add "caching-mode" optionAviv Ben-David2017-02-171-0/+1
* intel_iommu: support device iotlb descriptorJason Wang2017-01-101-2/+11
* intel_iommu: fixing source id during IOTLB hash key calculationJason Wang2016-11-151-1/+1
* intel_iommu: support all masks in interrupt entry cache invalidationRadim Krčmář2016-07-211-0/+1
* intel_iommu: Add support for Extended Interrupt ModeJan Kiszka2016-07-211-0/+2
* x86-iommu: introduce IEC notifiersPeter Xu2016-07-211-4/+20
* intel_iommu: Add support for PCI MSI remapPeter Xu2016-07-201-0/+2
* intel_iommu: add IR translation faults definesPeter Xu2016-07-201-0/+13
* intel_iommu: define interrupt remap table addr registerPeter Xu2016-07-201-0/+4
* intel_iommu: set IR bit for ECAP registerPeter Xu2016-07-201-0/+2
* intel_iommu: allow queued invalidation for IRPeter Xu2016-07-201-0/+2
* intel_iommu: large page supportJason Wang2016-02-061-2/+4
* intel-iommu: add IOTLB using hash tableLe Tan2014-08-281-1/+33
* intel-iommu: add context-cache to cache context-entryLe Tan2014-08-281-7/+16
* intel-iommu: add supports for queued invalidation interfaceLe Tan2014-08-281-6/+21
* intel-iommu: introduce Intel IOMMU (VT-d) emulationLe Tan2014-08-281-0/+333
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