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path: root/hw/intc/armv7m_nvic.c
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* target/arm: Add armv7m_nvic_set_pending_derived()Peter Maydell2018-02-091-2/+66
* hw/intc/armv7m: Support byte and halfword accesses to CFSRPeter Maydell2018-01-161-16/+22
* nvic: Make systick bankedPeter Maydell2017-12-131-13/+77
* nvic: Make nvic_sysreg_ns_ops work with any MemoryRegionPeter Maydell2017-12-131-3/+7
* nvic: Fix ARMv7M MPU_RBAR readsPeter Maydell2017-11-201-1/+1
* nvic: Fix miscalculation of offsets into ITNS arrayPeter Maydell2017-10-121-2/+2
* nvic: Add missing 'break'Peter Maydell2017-10-121-0/+1
* nvic: Add missing code for writing SHCSR.HARDFAULTPENDED bitPeter Maydell2017-10-061-0/+1
* nvic: Implement Security Attribution Unit registersPeter Maydell2017-10-061-0/+116
* target/arm: Add new-in-v8M SFSR and SFARPeter Maydell2017-10-061-0/+34
* target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler modePeter Maydell2017-10-061-1/+1
* nvic: Clear the vector arrays and prigroup on resetPeter Maydell2017-10-061-0/+5
* nvic: Support banked exceptions in acknowledge and completePeter Maydell2017-09-211-6/+20
* nvic: Make SHCSR banked for v8MPeter Maydell2017-09-211-52/+169
* nvic: Make ICSR banked for v8MPeter Maydell2017-09-211-13/+32
* target/arm: Handle banking in negative-execution-priority check in cpu_mmu_in...Peter Maydell2017-09-211-0/+29
* nvic: Handle v8M changes in nvic_exec_prio()Peter Maydell2017-09-211-9/+42
* nvic: Disable the non-secure HardFault if AIRCR.BFHFNMINS is clearPeter Maydell2017-09-211-2/+10
* nvic: Implement v8M changes to fixed priority exceptionsPeter Maydell2017-09-211-3/+19
* nvic: In escalation to HardFault, support HF not being priority -1Peter Maydell2017-09-211-11/+12
* nvic: Compare group priority for escalation to HFPeter Maydell2017-09-211-1/+1
* nvic: Make SHPR registers bankedPeter Maydell2017-09-211-9/+87
* nvic: Make set_pending and clear_pending take a secure parameterPeter Maydell2017-09-211-16/+48
* nvic: Handle banked exceptions in nvic_recompute_state()Peter Maydell2017-09-211-5/+146
* nvic: Implement NVIC_ITNS<n> registersPeter Maydell2017-09-211-7/+67
* nvic: Make ICSR.RETTOBASE handle banked exceptionsPeter Maydell2017-09-211-1/+4
* nvic: Implement AIRCR changes for v8MPeter Maydell2017-09-211-11/+38
* nvic: Add cached vectpending_prio statePeter Maydell2017-09-211-10/+13
* nvic: Add cached vectpending_is_s_banked statePeter Maydell2017-09-211-0/+1
* nvic: Add banked exception statesPeter Maydell2017-09-211-1/+52
* nvic: Don't apply group priority mask to negative prioritiesPeter Maydell2017-09-141-2/+9
* target/arm: Make CFSR register banked for v8MPeter Maydell2017-09-071-2/+13
* target/arm: Make MMFAR banked for v8MPeter Maydell2017-09-071-2/+2
* target/arm: Make CCR register banked for v8MPeter Maydell2017-09-071-6/+27
* target/arm: Make MPU_CTRL register banked for v8MPeter Maydell2017-09-071-4/+5
* target/arm: Make MPU_RNR register banked for v8MPeter Maydell2017-09-071-9/+9
* target/arm: Make MPU_RBAR, MPU_RLAR banked for v8MPeter Maydell2017-09-071-4/+4
* target/arm: Make MPU_MAIR0, MPU_MAIR1 registers banked for v8MPeter Maydell2017-09-071-4/+4
* target/arm: Make VTOR register banked for v8MPeter Maydell2017-09-071-6/+7
* nvic: Add NS alias SCS regionPeter Maydell2017-09-071-1/+65
* target/arm: Make FAULTMASK register banked for v8MPeter Maydell2017-09-071-1/+8
* target/arm: Make PRIMASK register banked for v8MPeter Maydell2017-09-071-1/+1
* target/arm: Make BASEPRI register banked for v8MPeter Maydell2017-09-071-2/+2
* target/arm: Implement ARMv8M's PMSAv8 registersPeter Maydell2017-09-071-8/+114
* nvic: Implement "user accesses BusFault" SCS region behaviourPeter Maydell2017-09-041-17/+41
* armv7m_nvic.h: Move from include/hw/arm to include/hw/intcPeter Maydell2017-09-041-1/+1
* target/arm: Don't store M profile PRIMASK and FAULTMASK in daifPeter Maydell2017-09-041-2/+2
* hw/intc/armv7m_nvic.c: Remove out of date commentPeter Maydell2017-09-041-4/+0Star
* target/arm: Rename cp15.c6_rgnr to pmsav7.rnrPeter Maydell2017-07-311-7/+7
* arm: add MPU support to M profile CPUsMichael Davidsaver2017-06-021-0/+104
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