summaryrefslogtreecommitdiffstats
path: root/hw/intc/armv7m_nvic.c
Commit message (Expand)AuthorAgeFilesLines
* hw/intc/armv7m_nvic: Rebuild hflags on resetPeter Maydell2020-03-121-0/+6
* target/arm: Add isar_feature_aa32_vfp_simdRichard Henderson2020-02-281-10/+10
* target/arm: Test correct register in aa32_pan and aa32_ats1e1 checksPeter Maydell2020-02-211-4/+4
* target/arm: Define an aa32_pmu_8_1 isar feature test functionPeter Maydell2020-02-211-1/+1
* qdev: set properties with device_class_set_props()Marc-André Lureau2020-01-241-1/+1
* target/arm: Rebuild hflags for M-profile NVICRichard Henderson2019-10-241-9/+13
* memory: Access MemoryRegion with endiannessTony Nguyen2019-09-031-7/+8
* hw/intc/armv7m_nic: Access MemoryRegion with MemOpTony Nguyen2019-09-031-4/+8
* Include hw/qdev-properties.h lessMarkus Armbruster2019-08-161-0/+1
* Include migration/vmstate.h lessMarkus Armbruster2019-08-161-0/+1
* Include hw/irq.h a lot lessMarkus Armbruster2019-08-161-0/+1
* target/arm: v8M: Check state of exception being returned fromPeter Maydell2019-07-041-1/+13
* arm v8M: Forcibly clear negative-priority exceptions on deactivatePeter Maydell2019-07-041-5/+35
* Include qemu/module.h where needed, drop it from qemu-common.hMarkus Armbruster2019-06-121-1/+1
* hw/intc/nvic: Use object_initialize_child for correct reference countingPhilippe Mathieu-Daudé2019-05-241-3/+3
* arm: Remove unnecessary includes of hw/arm/arm.hPeter Maydell2019-05-231-1/+0Star
* hw/intc/armv7m_nvic: Don't enable ARMV7M_EXCP_DEBUG from resetPeter Maydell2019-05-071-1/+3
* hw/intc/armv7m_nvic: NS BFAR and BFSR are RAZ/WI if BFHFNMINS == 0Peter Maydell2019-05-071-3/+24
* hw/arm/armv7m_nvic: Check subpriority in nvic_recompute_state_secure()Peter Maydell2019-05-071-2/+7
* target/arm: New function armv7m_nvic_set_pending_lazyfp()Peter Maydell2019-04-291-0/+96
* target/arm: Implement v7m_update_fpccr()Peter Maydell2019-04-291-0/+34
* target/arm: Implement dummy versions of M-profile FP-related registersPeter Maydell2019-04-291-0/+125
* hw/intc/armv7m_nvic: Allow reading of M-profile MVFR* registersPeter Maydell2019-04-291-0/+6
* hw/intc/armv7m_nvic: Allow byte accesses to SHPR1Peter Maydell2019-02-151-2/+2
* armv7m: Don't assume the NVIC's CPU is CPU 0Peter Maydell2019-02-011-2/+1Star
* target/arm: Move some system registers into a substructureRichard Henderson2018-10-241-6/+6
* nvic: Expose NMI linePeter Maydell2018-08-201-0/+19
* nvic: Change NVIC to support ARMv6-MJulia Suvorova2018-08-141-3/+18
* arm: Add ARMv6-M programmer's model supportJulia Suvorova2018-08-141-0/+10
* nvic: Handle ARMv6-M SCS reserved registersJulia Suvorova2018-08-141-2/+49
* armv7m_nvic: Fix m-security subsection namePeter Maydell2018-07-301-1/+1
* target/arm: Escalate to correct HardFault when AIRCR.BFHFNMINS is setPeter Maydell2018-07-241-2/+6
* hw/arm/armv7: Fix crash when introspecting the "iotkit" deviceThomas Huth2018-07-171-3/+2Star
* arm: Don't crash if user tries to use a Cortex-M CPU without an NVICPeter Maydell2018-06-151-1/+5
* hw/intc/armv7m_nvic: Fix byte-to-interrupt number conversionsPeter Maydell2018-02-151-4/+4
* hw/intc/armv7m_nvic: Implement SCRPeter Maydell2018-02-151-4/+8
* hw/intc/armv7m_nvic: Implement cache ID registersPeter Maydell2018-02-151-0/+16
* hw/intc/armv7m_nvic: Implement v8M CPPWR registerPeter Maydell2018-02-151-0/+14
* hw/intc/armv7m_nvic: Implement M profile cache maintenance opsPeter Maydell2018-02-151-0/+12
* hw/intc/armv7m_nvic: Fix ICSR PENDNMISET/CLR handlingPeter Maydell2018-02-151-3/+3
* hw/intc/armv7m_nvic: Don't hardcode M profile ID registers in NVICPeter Maydell2018-02-151-14/+16
* target/arm: Split "get pending exception info" from "acknowledge it"Peter Maydell2018-02-091-7/+23
* target/arm: Add armv7m_nvic_set_pending_derived()Peter Maydell2018-02-091-2/+66
* hw/intc/armv7m: Support byte and halfword accesses to CFSRPeter Maydell2018-01-161-16/+22
* nvic: Make systick bankedPeter Maydell2017-12-131-13/+77
* nvic: Make nvic_sysreg_ns_ops work with any MemoryRegionPeter Maydell2017-12-131-3/+7
* nvic: Fix ARMv7M MPU_RBAR readsPeter Maydell2017-11-201-1/+1
* nvic: Fix miscalculation of offsets into ITNS arrayPeter Maydell2017-10-121-2/+2
* nvic: Add missing 'break'Peter Maydell2017-10-121-0/+1
* nvic: Add missing code for writing SHCSR.HARDFAULTPENDED bitPeter Maydell2017-10-061-0/+1
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-01-09 08:19:57 +0100