bwlp/qemu.git - Experimental fork of QEMU with video encoding patches

	Commit message (Expand)	Author	Age	Files	Lines
*	riscv: re-randomize rng-seed on reboot	Jason A. Donenfeld	2022-10-27	1	-0/+3
*	hw/riscv: virt: Enable booting S-mode firmware from pflash	Sunil V L	2022-10-14	1	-0/+29
*	hw/riscv: Update comment for qtest check in riscv_find_firmware()	Bin Meng	2022-10-14	1	-2/+2
*	hw/riscv: remove 'fdt' param from riscv_setup_rom_reset_vec()	Daniel Henrique Barboza	2022-09-07	1	-3/+1
*	hw/riscv: boot: Reduce FDT address alignment constraints	Alistair Francis	2022-07-03	1	-2/+2
*	hw/core/loader: return image sizes as ssize_t	Jamie Iles	2022-06-10	1	-2/+3
*	hw/riscv: boot: Support 64bit fdt address.	Dylan Jhong	2022-04-22	1	-5/+7
*	Remove qemu-common.h include from most units	Marc-André Lureau	2022-04-06	1	-1/+0
*	target/riscv: Support start kernel directly by KVM	Yifei Jiang	2022-01-21	1	-1/+15
*	hw/riscv: Use load address rather than entry point for fw_dynamic next_addr	Jessica Clarke	2021-12-20	1	-3/+10
*	hw/riscv: boot: Add a PLIC config string function	Alistair Francis	2021-10-28	1	-0/+25
*	target/riscv: Replace riscv_cpu_is_32bit with riscv_cpu_mxl	Richard Henderson	2021-10-21	1	-1/+1
*	hw/riscv/boot: Check the error of fdt_pack()	Alistair Francis	2021-07-15	1	-2/+4
*	riscv: Pass RISCVHartArrayState by pointer	Alistair Francis	2021-01-16	1	-6/+4
*	RISC-V: Place DTB at 3GB boundary instead of 4GB	Atish Patra	2021-01-16	1	-4/+4
*	hw/riscv: Use the CPU to determine if 32-bit	Alistair Francis	2020-12-18	1	-21/+10
*	hw/riscv: boot: Remove compile time XLEN checks	Alistair Francis	2020-12-18	1	-25/+30
*	hw/riscv: Expand the is 32-bit check to support more CPUs	Alistair Francis	2020-12-18	1	-1/+11
*	vl: extract softmmu/datadir.c	Paolo Bonzini	2020-12-10	1	-0/+1
*	riscv: do not use ram_size global	Paolo Bonzini	2020-12-10	1	-2/+3
*	hw/riscv: Load the kernel after the firmware	Alistair Francis	2020-10-22	1	-5/+14
*	hw/riscv: Add a riscv_is_32_bit() function	Alistair Francis	2020-10-22	1	-0/+9
*	hw/riscv: Return the end address of the loaded firmware	Alistair Francis	2020-10-22	1	-11/+17
*	load_elf: Remove unused address variables from callers	BALATON Zoltan	2020-09-26	1	-4/+4
*	RISC-V: Support 64 bit start address	Atish Patra	2020-07-14	1	-1/+5
*	riscv: Add opensbi firmware dynamic support	Atish Patra	2020-07-14	1	-4/+38
*	RISC-V: Copy the fdt in dram instead of ROM	Atish Patra	2020-07-14	1	-15/+38
*	riscv: Unify Qemu's reset vector code path	Atish Patra	2020-07-14	1	-0/+46
*	riscv: Change the default behavior if no -bios option is specified	Bin Meng	2020-06-03	1	-27/+4
*	riscv: Suppress the error report for QEMU testing with riscv_find_firmware()	Bin Meng	2020-06-03	1	-3/+11
*	hw/riscv: Add optional symbol callback ptr to riscv_load_firmware()	Anup Patel	2020-04-29	1	-5/+8
*	hw/core/loader: Let load_elf() populate a field with CPU-specific flags	Aleksandar Markovic	2020-01-29	1	-2/+2
*	hw/riscv: Add optional symbol callback ptr to riscv_load_kernel()	Zhuang, Siwei (Data61, Kensington NSW)	2019-11-25	1	-3/+4
*	riscv/boot: Fix possible memory leak	Alistair Francis	2019-10-28	1	-7/+4
*	riscv: Resolve full path of the given bios image	Bin Meng	2019-09-17	1	-3/+3
*	riscv: Add a helper routine for finding firmware	Bin Meng	2019-09-17	1	-7/+15
*	Include hw/boards.h a bit less	Markus Armbruster	2019-08-16	1	-1/+1
*	riscv/boot: Fixup the RISC-V firmware warning	Alistair Francis	2019-07-27	1	-4/+8
*	hw/riscv: Load OpenSBI as the default firmware	Alistair Francis	2019-07-18	1	-0/+54
*	hw/riscv: Extend the kernel loading support	Alistair Francis	2019-06-27	1	-4/+14
*	hw/riscv: Add support for loading a firmware	Alistair Francis	2019-06-27	1	-0/+26
*	hw/riscv: Split out the boot functions	Alistair Francis	2019-06-27	1	-0/+69