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spice_video_codecs
Experimental fork of QEMU with video encoding patches
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path:
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hw
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riscv
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opentitan.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
hw/riscv: Drop 'struct MemmapEntry'
Bin Meng
2021-03-04
1
-6
/
+3
*
riscv/opentitan: Update the OpenTitan memory layout
Alistair Francis
2020-12-18
1
-24
/
+57
*
hw/riscv: Load the kernel after the firmware
Alistair Francis
2020-10-22
1
-1
/
+2
*
target/riscv: cpu: Set reset vector based on the configured property value
Bin Meng
2020-09-10
1
-0
/
+1
*
opentitan: Rename memmap enum constants
Eduardo Habkost
2020-08-27
1
-42
/
+42
*
error: Eliminate error_propagate() with Coccinelle, part 1
Markus Armbruster
2020-07-10
1
-5
/
+2
*
qom: Put name parameter before value / visitor parameter
Markus Armbruster
2020-07-10
1
-2
/
+2
*
qdev: Use returned bool to check for qdev_realize() etc. failure
Markus Armbruster
2020-07-10
1
-4
/
+2
*
hw/riscv: opentitan: Remove the riscv_ prefix of the machine* and soc* functions
Bin Meng
2020-06-19
1
-15
/
+14
*
riscv/opentitan: Connect the UART device
Alistair Francis
2020-06-19
1
-2
/
+23
*
riscv/opentitan: Connect the PLIC device
Alistair Francis
2020-06-19
1
-2
/
+12
*
riscv/opentitan: Fix the ROM size
Alistair Francis
2020-06-19
1
-1
/
+2
*
qdev: Convert bus-less devices to qdev_realize() with Coccinelle
Markus Armbruster
2020-06-15
1
-2
/
+1
*
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 2
Markus Armbruster
2020-06-15
1
-4
/
+2
*
qom: Less verbose object_initialize_child()
Markus Armbruster
2020-06-15
1
-2
/
+1
*
riscv: Fix to put "riscv.hart_array" devices on sysbus
Markus Armbruster
2020-06-15
1
-3
/
+2
*
riscv: Initial commit of OpenTitan machine
Alistair Francis
2020-06-03
1
-0
/
+184