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* riscv/boot: Fixup the RISC-V firmware warningAlistair Francis2019-07-271-4/+8
* hw/riscv: Load OpenSBI as the default firmwareAlistair Francis2019-07-183-6/+66
* hw/riscv: Replace global smp variables with machine smp propertiesLike Xu2019-07-055-6/+18
* hw/riscv: Extend the kernel loading supportAlistair Francis2019-06-271-4/+14
* hw/riscv: Add support for loading a firmwareAlistair Francis2019-06-273-0/+34
* hw/riscv: Split out the boot functionsAlistair Francis2019-06-276-93/+83Star
* riscv: sifive_u: Update the plic hart config to support multicoreBin Meng2019-06-271-1/+15
* riscv: sifive_u: Do not create hard-coded phandles in DTBin Meng2019-06-271-7/+10
* riscv: virt: Add cpu-topology DT node.Atish Patra2019-06-261-2/+20
* RISC-V: Fix a memory leak when realizing a sifive_ePalmer Dabbelt2019-06-241-7/+6Star
* riscv: virt: Correct pci "bus-range" encodingBin Meng2019-06-241-1/+1
* sifive_prci: Read and write PRCI registersNathaniel Graff2019-06-241-8/+41
* Include qemu/module.h where needed, drop it from qemu-common.hMarkus Armbruster2019-06-125-0/+5
* riscv: spike: Add a generic spike machineAlistair Francis2019-05-241-1/+105
* riscv: virt: Allow specifying a CPU via commandlineAlistair Francis2019-05-241-1/+2
* target/riscv: Remove unused include of riscv_htif.h for virt board riscvJonathan Behrens2019-05-241-1/+0Star
* SiFive RISC-V GPIO DeviceFabien Chouteau2019-05-244-2/+422
* riscv: plic: Log guest errorsAlistair Francis2019-04-051-3/+9
* riscv: plic: Fix incorrect irq calculationAlistair Francis2019-04-051-2/+2
* Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2019-03-282-0/+4
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| * kconfig: add CONFIG_MSI_NONBROKENPaolo Bonzini2019-03-181-0/+1
| * riscv: plic: Set msi_nonbroken as trueAlistair Francis2019-03-181-0/+3
* | riscv: sifive_u: Correct UART0's IRQ in the device treeBin Meng2019-03-191-1/+1
* | riscv: sifive_uart: Generate TX interruptBin Meng2019-03-191-1/+3
* | riscv: sifive_u: Allow up to 4 CPUs to be createdAlistair Francis2019-03-191-1/+4
* | RISC-V: Allow interrupt controllers to claim interruptsMichael Clark2019-03-191-0/+15
* | RISC-V: Replace __builtin_popcount with ctpop8 in PLICMichael Clark2019-03-191-2/+2
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* riscv/Kconfig: enable PCI_DEVICESDavid Abdurachmanov2019-03-111-0/+3
* riscv-softmmu.mak: replace CONFIG_* with Kconfig "select" directivesPaolo Bonzini2019-03-071-0/+13
* kconfig: introduce kconfig filesPaolo Bonzini2019-03-071-0/+20
* riscv: Ensure the kernel start address is correctly castAlistair Francis2019-02-124-4/+4
* hw/riscv/Makefile.objs: Create CONFIG_* for riscv boardsYang Zhong2019-02-051-11/+11
* elf: Add optional function ptr to load_elf() to parse ELF notesLiam Merwick2019-02-054-4/+4
* sifive_uart: Implement interrupt pending registerNathaniel Graff2018-12-201-5/+19
* RISC-V: Enable second UART on sifive_e and sifive_uMichael Clark2018-12-202-6/+4Star
* RISC-V: Fix PLIC pending bitfield readsMichael Clark2018-12-201-1/+1
* RISC-V: Fix CLINT timecmp low 32-bit writesMichael Clark2018-12-201-4/+4
* sifive_u: Set 'clock-frequency' DT property for SiFive UARTAnup Patel2018-12-201-0/+2
* sifive_u: Add clock DT node for GEM ethernetAnup Patel2018-12-201-1/+17
* hw/riscv/virt: Connect the gpex PCIeAlistair Francis2018-12-201-1/+130
* hw/riscv/virt: Adjust memory layout spacingAlistair Francis2018-12-201-8/+8
* hw/riscv/virt: Free the test device tree node nameAlistair Francis2018-11-141-0/+1
* riscv: spike: Fix memory leak in the board initAlistair Francis2018-11-081-3/+3
* RISC-V: Don't add NULL bootargs to device-treeMichael Clark2018-10-173-4/+10
* RISC-V: Add missing free for plic_hart_configMichael Clark2018-10-171-0/+2
* RISC-V: Allow setting and clearing multiple irqsMichael Clark2018-10-172-6/+6
* Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2018-09-24' into...Peter Maydell2018-09-254-5/+5
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| * Drop "qemu:" prefix from error_report() argumentsMao Zhongyi2018-09-244-5/+5
* | hw/riscv/spike: Set the soc device tree node as a simple-busAlistair Francis2018-09-051-1/+1
* | hw/riscv/virtio: Set the soc device tree node as a simple-busAlistair Francis2018-09-051-1/+1