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path: root/include/hw/ppc/pnv.h
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* ppc/pnv: Clarify how the TIMA is accessed on a multichip systemCédric Le Goater2019-12-171-0/+3
* ppc/pnv: Fix TIMA indirect accessCédric Le Goater2019-12-171-0/+2
* ppc/pnv: Introduce a pnv_xive_is_cpu_enabled() helperCédric Le Goater2019-12-171-0/+5
* ppc/pnv: Instantiate cores separatelyGreg Kurz2019-12-171-1/+1
* ppc/pnv: Create BMC devices at machine initCédric Le Goater2019-12-171-1/+1
* ppc/pnv: Add HIOMAP commandsCédric Le Goater2019-12-171-0/+1
* ppc/pnv: Add a PNOR modelCédric Le Goater2019-12-171-0/+3
* ppc: Add intc_destroy() handlers to SpaprInterruptController/PnvChipGreg Kurz2019-11-181-0/+1
* ppc: Reset the interrupt presenter from the CPU reset handlerCédric Le Goater2019-10-241-0/+1
* hw/ppc/pnv_homer: add PowerNV homer device modelBalamuruhan S2019-10-041-0/+3
* hw/ppc/pnv_xscom: retrieve homer/occ base address from PBA BARsBalamuruhan S2019-10-041-0/+18
* ppc/pnv: remove xscom_base field from PnvChipCédric Le Goater2019-07-021-4/+1Star
* ppc/pnv: fix XSCOM MMIO base address for P9 machines with multiple chipsCédric Le Goater2019-07-021-0/+3
* Clean up ill-advised or unusual header guardsMarkus Armbruster2019-05-131-3/+4
* ppc/pnv: POWER9 XSCOM quad supportCédric Le Goater2019-03-121-0/+4
* ppc/pnv: add a OCC model for POWER9Cédric Le Goater2019-03-121-0/+1
* ppc/pnv: add a LPC Controller model for POWER9Cédric Le Goater2019-03-121-0/+4
* ppc/pnv: add a 'dt_isa_nodename' to the chipCédric Le Goater2019-03-121-0/+2
* ppc/pnv: add a PSI bridge model for POWER9Cédric Le Goater2019-03-121-0/+6
* ppc/pnv: add a PSI bridge class modelCédric Le Goater2019-03-121-1/+1
* ppc/pnv: introduce a new pic_print_info() operation to the chip modelCédric Le Goater2019-03-121-0/+1
* ppc/pnv: introduce a new dt_populate() operation to the chip modelCédric Le Goater2019-03-121-0/+1
* ppc/pnv: add a XIVE interrupt controller model for POWER9Cédric Le Goater2019-03-121-0/+21
* spapr: modify the prototype of the cpu_intc_create() methodCédric Le Goater2019-01-081-1/+1
* ppc/pnv: introduce Pnv8Chip and Pnv9Chip modelsCédric Le Goater2018-06-211-1/+23
* ppc/pnv: introduce a new isa_create() operation to the chip modelCédric Le Goater2018-06-211-0/+1
* ppc/pnv: introduce a new intc_create() operation to the chip modelCédric Le Goater2018-06-211-0/+1
* ppc/pnv: fix XSCOM core addressing on POWER9Cédric Le Goater2018-01-161-1/+0Star
* ppc/pnv: introduce pnv*_is_power9() helpersCédric Le Goater2018-01-161-0/+10
* ppc/pnv: change powernv_ prefix to pnv_ for overall naming consistencyCédric Le Goater2018-01-101-5/+5
* ppc: pnv: drop PnvChipClass::cpu_model fieldIgor Mammedov2017-10-171-1/+0Star
* ppc: pnv: normalize core/chip type namesIgor Mammedov2017-10-171-4/+7
* ppc: pnv: use generic cpu_model parsingIgor Mammedov2017-10-171-4/+4
* pnv: Fix build failures on some host platformsDavid Gibson2017-05-111-2/+1Star
* ppc/pnv: generate an OEM SEL event on shutdownCédric Le Goater2017-04-261-0/+2
* ppc/pnv: add initial IPMI sensors for the BMC simulatorCédric Le Goater2017-04-261-0/+9
* ppc/pnv: Add OCC model stub with interrupt supportBenjamin Herrenschmidt2017-04-261-0/+2
* ppc/pnv: Add cut down PSI bridge model and hookup external interruptCédric Le Goater2017-04-261-0/+13
* ppc/pnv: add memory regions for the ICP registersCédric Le Goater2017-04-261-0/+19
* ppc/pnv: add a helper to calculate MMIO addresses registersCédric Le Goater2017-04-261-1/+11
* ppc/pnv: add a 'xscom_core_base' field to PnvChipClassCédric Le Goater2016-11-151-0/+1
* ppc/pnv: fix compile breakage on old gccCédric Le Goater2016-11-151-1/+0Star
* ppc/pnv: add a ISA busCédric Le Goater2016-10-281-0/+2
* ppc/pnv: add a LPC controllerBenjamin Herrenschmidt2016-10-281-0/+3
* ppc/pnv: add XSCOM infrastructureCédric Le Goater2016-10-281-0/+15
* ppc/pnv: add a PnvCore objectCédric Le Goater2016-10-281-0/+2
* ppc/pnv: add a PIR handler to PnvChipCédric Le Goater2016-10-281-0/+2
* ppc/pnv: add a core mask to PnvChipCédric Le Goater2016-10-281-0/+4
* ppc/pnv: add a PnvChip objectCédric Le Goater2016-10-281-0/+63
* ppc/pnv: add skeleton PowerNV platformBenjamin Herrenschmidt2016-10-281-0/+38
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