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path: root/target-arm/internals.h
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* Fix confusing argument names in some common functionsSergey Sorokin2016-07-121-2/+3
* target-arm: Provide hook to tell GICv3 about changes of security statePeter Maydell2016-06-171-0/+8
* target-arm: Set IL bit in syndromes for insn abort, watchpoint, swstepPeter Maydell2016-06-061-3/+3
* arm: move arm_log_exception into .c filePaolo Bonzini2016-05-191-15/+0Star
* target-arm: Split data abort syndrome generatorPeter Maydell2016-05-121-3/+21
* target-arm: Move bank_number() into internals.hPeter Maydell2016-02-181-1/+25
* target-arm: Implement checking of fired watchpointSergey Fedorov2016-02-111-0/+3
* target-arm: Correct misleading 'is_thumb' syn_* parameter namesPeter Maydell2016-02-111-14/+14
* target-arm: Use the right MMU index in arm_regime_using_lpae_formatAlvise Rigo2016-01-151-2/+3
* target-arm: raise exception on misaligned LDREX operandsAndrew Baumann2015-12-171-0/+7
* target-arm: Add and use symbolic names for register banksSoren Brinkmann2015-11-031-3/+13
* target-arm: Add ARMMMUFaultInfoEdgar E. Iglesias2015-10-271-1/+14
* target-arm: Add computation of starting level for S2 PTWEdgar E. Iglesias2015-10-271-0/+25
* target-arm: Wire up HLT 0xf000 as the A64 semihosting instructionPeter Maydell2015-09-071-0/+2
* arm: Refactor get_phys_addr FSR return mechanismPeter Crosthwaite2015-06-151-1/+2
* target-arm: Move setting of exception info into tlb_fillPeter Maydell2015-05-291-0/+3
* target-arm: Add WFx syndrome functionGreg Bellows2015-05-181-0/+6
* target-arm: Store SPSR_EL1 state in banked_spsr[1] (SPSR_svc)Peter Maydell2015-04-011-1/+4
* target-arm: make TTBCR bankedFabian Aggeler2014-12-111-3/+3
* target-arm: rename arm_current_pl to arm_current_elGreg Bellows2014-10-241-1/+1
* target-arm: add emulation of PSCI calls for system emulationRob Herring2014-10-241-0/+12
* target-arm: Add support for A32 and T32 HVC and SMC insnsPeter Maydell2014-10-241-0/+10
* target-arm: Add support for VIRQ and VFIQEdgar E. Iglesias2014-09-291-0/+2
* target-arm: A64: Emulate the SMC insnEdgar E. Iglesias2014-09-291-0/+6
* target-arm: Add a Hypervisor Trap exception typeEdgar E. Iglesias2014-09-291-0/+1
* target-arm: A64: Emulate the HVC insnEdgar E. Iglesias2014-09-291-0/+6
* target-arm: Implement handling of breakpoint firingPeter Maydell2014-09-291-0/+6
* target-arm: Implement setting guest breakpointsPeter Maydell2014-09-291-0/+9
* target-arm: Implement handling of fired watchpointsPeter Maydell2014-09-121-0/+9
* target-arm: Move extended_addresses_enabled() to internals.hPeter Maydell2014-09-121-0/+11
* target-arm: Implement setting of watchpointsPeter Maydell2014-09-121-0/+10
* target-arm: Implement ARMv8 single-step handling for A64 codePeter Maydell2014-08-191-0/+6
* target-arm: A64: Break out aarch64_save/restore_spEdgar E. Iglesias2014-08-041-9/+20
* target-arm: A64: Generalize update_spsel for the various ELsEdgar E. Iglesias2014-05-271-5/+6
* target-arm: A64: Introduce aarch64_banked_spsr_index()Edgar E. Iglesias2014-05-271-0/+14
* target-arm: Move arm_log_exception() into internals.hPeter Maydell2014-04-171-0/+31
* target-arm: Implement SP_EL0, SP_EL1Peter Maydell2014-04-171-0/+25
* target-arm: A64: Correctly fault FP/Neon if CPACR.FPEN setPeter Maydell2014-04-171-0/+7
* target-arm: Provide syndrome information for MMU faultsRob Herring2014-04-171-0/+13
* target-arm: Add support for generating exceptions with syndrome informationPeter Maydell2014-04-171-0/+14
* target-arm: Provide correct syndrome information for cpreg access trapsPeter Maydell2014-04-171-0/+128
* target-arm: Split out private-to-target functions into internals.hPeter Maydell2014-04-171-0/+49
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