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path: root/target/arm/machine.c
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* target/arm: Implement v8M MSPLIM and PSPLIM registersPeter Maydell2018-02-151-0/+21
* target/arm: Migrate v7m.other_spPeter Maydell2018-02-151-0/+11
* target/arm: Add AIRCR to vmstate structPeter Maydell2018-02-151-0/+4
* hw/intc/armv7m_nvic: Implement SCRPeter Maydell2018-02-151-0/+12
* hw/intc/armv7m_nvic: Implement cache ID registersPeter Maydell2018-02-151-0/+36
* target/arm: Add SVE to migration stateRichard Henderson2018-02-091-0/+53
* target/arm: Expand vector registers for SVERichard Henderson2018-02-091-1/+34
* target/arm: Change the type of vfp.regsRichard Henderson2018-01-251-1/+1
* nvic: Implement Security Attribution Unit registersPeter Maydell2017-10-061-0/+14
* target/arm: Add new-in-v8M SFSR and SFARPeter Maydell2017-10-061-0/+2
* migration: pre_save return intDr. David Alan Gilbert2017-09-271-1/+3
* target/arm: Implement BXNS, and banked stack pointersPeter Maydell2017-09-071-0/+2
* target/arm: Make CFSR register banked for v8MPeter Maydell2017-09-071-1/+2
* target/arm: Make MMFAR banked for v8MPeter Maydell2017-09-071-1/+2
* target/arm: Make CCR register banked for v8MPeter Maydell2017-09-071-1/+2
* target/arm: Make MPU_CTRL register banked for v8MPeter Maydell2017-09-071-1/+2
* target/arm: Make MPU_RNR register banked for v8MPeter Maydell2017-09-071-2/+11
* target/arm: Make MPU_RBAR, MPU_RLAR banked for v8MPeter Maydell2017-09-071-4/+8
* target/arm: Make MPU_MAIR0, MPU_MAIR1 registers banked for v8MPeter Maydell2017-09-071-2/+4
* target/arm: Make VTOR register banked for v8MPeter Maydell2017-09-071-1/+2
* target/arm: Make CONTROL register banked for v8MPeter Maydell2017-09-071-1/+2
* target/arm: Make FAULTMASK register banked for v8MPeter Maydell2017-09-071-2/+3
* target/arm: Make PRIMASK register banked for v8MPeter Maydell2017-09-071-2/+7
* target/arm: Make BASEPRI register banked for v8MPeter Maydell2017-09-071-1/+2
* target/arm: Add state field, feature bit and migration for v8M secure statePeter Maydell2017-09-071-0/+20
* target/arm: Implement ARMv8M's PMSAv8 registersPeter Maydell2017-09-071-1/+28
* target/arm: Don't use cpsr_write/cpsr_read to transfer M profile XPSRPeter Maydell2017-09-041-15/+34
* target/arm: Don't store M profile PRIMASK and FAULTMASK in daifPeter Maydell2017-09-041-0/+33
* target/arm: Migrate MPU_RNR register state for M profile coresPeter Maydell2017-07-311-0/+28
* target/arm: Rename cp15.c6_rgnr to pmsav7.rnrPeter Maydell2017-07-311-1/+1
* arm: add MPU support to M profile CPUsMichael Davidsaver2017-06-021-2/+3
* arm: Clean up handling of no-MPU PMSA CPUsPeter Maydell2017-06-021-1/+1
* target-arm/powerctl: defer cpu reset work to CPU contextAlex Bennée2017-02-241-1/+40
* armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFARPeter Maydell2017-01-271-2/+8
* armv7m: Fix reads of CONTROL register bit 1Michael Davidsaver2017-01-271-4/+2Star
* migration: extend VMStateInfoJianjun Duan2017-01-241-4/+10
* Move target-* CPU file into a target/ folderThomas Huth2016-12-201-0/+333