| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | target/arm: Implement SVE2 complex integer dot product | Richard Henderson | 2021-05-25 | 1 | -0/+9 |
| * | target/arm: Implement SVE2 complex integer multiply-add (indexed) | Richard Henderson | 2021-05-25 | 1 | -0/+12 |
| * | target/arm: Implement SVE2 integer multiply long (indexed) | Richard Henderson | 2021-05-25 | 1 | -0/+10 |
| * | target/arm: Implement SVE2 multiply-add long (indexed) | Richard Henderson | 2021-05-25 | 1 | -0/+18 |
| * | target/arm: Implement SVE2 saturating multiply high (indexed) | Richard Henderson | 2021-05-25 | 1 | -0/+8 |
| * | target/arm: Implement SVE2 signed saturating doubling multiply high | Richard Henderson | 2021-05-25 | 1 | -0/+4 |
| * | target/arm: Implement SVE2 saturating multiply (indexed) | Richard Henderson | 2021-05-25 | 1 | -0/+12 |
| * | target/arm: Implement SVE2 saturating multiply-add (indexed) | Richard Henderson | 2021-05-25 | 1 | -0/+18 |
| * | target/arm: Implement SVE2 saturating multiply-add high (indexed) | Richard Henderson | 2021-05-25 | 1 | -0/+8 |
| * | target/arm: Implement SVE2 integer multiply-add (indexed) | Richard Henderson | 2021-05-25 | 1 | -0/+8 |
| * | target/arm: Implement SVE2 integer multiply (indexed) | Richard Henderson | 2021-05-25 | 1 | -0/+7 |
| * | target/arm: Split out formats for 3 vectors + 1 index | Richard Henderson | 2021-05-25 | 1 | -10/+19 |
| * | target/arm: Split out formats for 2 vectors + 1 index | Richard Henderson | 2021-05-25 | 1 | -4/+10 |
| * | target/arm: Pass separate addend to {U, S}DOT helpers | Richard Henderson | 2021-05-25 | 1 | -3/+4 |
| * | target/arm: Implement SVE2 SPLICE, EXT | Stephen Long | 2021-05-25 | 1 | -2/+9 |
| * | target/arm: Implement SVE2 FMMLA | Stephen Long | 2021-05-25 | 1 | -0/+4 |
| * | target/arm: Implement SVE2 gather load insns | Stephen Long | 2021-05-25 | 1 | -0/+11 |
| * | target/arm: Implement SVE2 scatter store insns | Stephen Long | 2021-05-25 | 1 | -0/+10 |
| * | target/arm: Implement SVE2 XAR | Richard Henderson | 2021-05-25 | 1 | -0/+4 |
| * | target/arm: Implement SVE2 HISTCNT, HISTSEG | Stephen Long | 2021-05-25 | 1 | -0/+6 |
| * | target/arm: Implement SVE2 RSUBHNB, RSUBHNT | Stephen Long | 2021-05-25 | 1 | -0/+2 |
| * | target/arm: Implement SVE2 SUBHNB, SUBHNT | Stephen Long | 2021-05-25 | 1 | -0/+2 |
| * | target/arm: Implement SVE2 RADDHNB, RADDHNT | Stephen Long | 2021-05-25 | 1 | -0/+2 |
| * | target/arm: Implement SVE2 ADDHNB, ADDHNT | Stephen Long | 2021-05-25 | 1 | -0/+5 |
| * | target/arm: Implement SVE2 complex integer multiply-add | Richard Henderson | 2021-05-25 | 1 | -0/+5 |
| * | target/arm: Implement SVE2 integer multiply-add long | Richard Henderson | 2021-05-25 | 1 | -0/+11 |
| * | target/arm: Implement SVE2 saturating multiply-add high | Richard Henderson | 2021-05-25 | 1 | -0/+5 |
| * | target/arm: Implement SVE2 saturating multiply-add long | Richard Henderson | 2021-05-25 | 1 | -0/+14 |
| * | target/arm: Implement SVE2 MATCH, NMATCH | Stephen Long | 2021-05-25 | 1 | -0/+5 |
| * | target/arm: Implement SVE2 bitwise ternary operations | Richard Henderson | 2021-05-25 | 1 | -0/+12 |
| * | target/arm: Implement SVE2 WHILERW, WHILEWR | Richard Henderson | 2021-05-25 | 1 | -0/+3 |
| * | target/arm: Implement SVE2 WHILEGT, WHILEGE, WHILEHI, WHILEHS | Richard Henderson | 2021-05-25 | 1 | -1/+1 |
| * | target/arm: Implement SVE2 SQSHRN, SQRSHRN | Richard Henderson | 2021-05-25 | 1 | -0/+4 |
| * | target/arm: Implement SVE2 UQSHRN, UQRSHRN | Richard Henderson | 2021-05-25 | 1 | -0/+4 |
| * | target/arm: Implement SVE2 SQSHRUN, SQRSHRUN | Richard Henderson | 2021-05-25 | 1 | -0/+4 |
| * | target/arm: Implement SVE2 SHRN, RSHRN | Richard Henderson | 2021-05-25 | 1 | -0/+8 |
| * | target/arm: Implement SVE2 floating-point pairwise | Stephen Long | 2021-05-25 | 1 | -0/+8 |
| * | target/arm: Implement SVE2 saturating extract narrow | Richard Henderson | 2021-05-25 | 1 | -0/+12 |
| * | target/arm: Implement SVE2 integer absolute difference and accumulate | Richard Henderson | 2021-05-25 | 1 | -0/+6 |
| * | target/arm: Implement SVE2 bitwise shift and insert | Richard Henderson | 2021-05-25 | 1 | -0/+5 |
| * | target/arm: Implement SVE2 bitwise shift right and accumulate | Richard Henderson | 2021-05-25 | 1 | -0/+8 |
| * | target/arm: Implement SVE2 integer add/subtract long with carry | Richard Henderson | 2021-05-25 | 1 | -0/+6 |
| * | target/arm: Implement SVE2 integer absolute difference and accumulate long | Richard Henderson | 2021-05-25 | 1 | -0/+12 |
| * | target/arm: Implement SVE2 complex integer add | Richard Henderson | 2021-05-25 | 1 | -0/+9 |
| * | target/arm: Implement SVE2 bitwise permute | Richard Henderson | 2021-05-25 | 1 | -0/+6 |
| * | target/arm: Implement SVE2 bitwise exclusive-or interleaved | Richard Henderson | 2021-05-25 | 1 | -0/+5 |
| * | target/arm: Implement SVE2 bitwise shift left long | Richard Henderson | 2021-05-25 | 1 | -0/+8 |
| * | target/arm: Implement SVE2 PMULLB, PMULLT | Richard Henderson | 2021-05-25 | 1 | -0/+2 |
| * | target/arm: Implement SVE2 integer multiply long | Richard Henderson | 2021-05-25 | 1 | -0/+9 |
| * | target/arm: Implement SVE2 integer add/subtract wide | Richard Henderson | 2021-05-25 | 1 | -0/+12 |
