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path: root/target/arm/translate-sve.c
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* arm tcg cpus: Fix Lesser GPL version numberChetan Pant2020-11-151-1/+1
* target/arm: Fix SVE spliceRichard Henderson2020-10-011-1/+1
* target/arm: Fix sve ldr/strRichard Henderson2020-10-011-2/+2
* target/arm: Remove local definitions of float constantsPeter Maydell2020-09-011-4/+0Star
* target/arm: Split out gen_gvec_ool_zzRichard Henderson2020-08-281-8/+12
* target/arm: Split out gen_gvec_ool_zzzRichard Henderson2020-08-281-35/+18Star
* target/arm: Split out gen_gvec_ool_zzpRichard Henderson2020-08-281-15/+14Star
* target/arm: Merge helper_sve_clr_* and helper_sve_movz_*Richard Henderson2020-08-281-32/+17Star
* target/arm: Split out gen_gvec_ool_zzzpRichard Henderson2020-08-281-19/+16Star
* target/arm: Use tcg_gen_gvec_bitsel for trans_SEL_ppppRichard Henderson2020-08-281-23/+8Star
* target/arm: Clean up 4-operand predicate expansionRichard Henderson2020-08-281-68/+43Star
* target/arm: Merge do_vector2_p into do_mov_pRichard Henderson2020-08-281-13/+6Star
* target/arm: Split out gen_gvec_fn_zzz, do_zzz_fnRichard Henderson2020-08-281-19/+24
* target/arm: Split out gen_gvec_fn_zzRichard Henderson2020-08-281-9/+10
* target/arm: Replace A64 get_fpstatus_ptr() with generic fpstatus_ptr()Peter Maydell2020-08-241-17/+17
* meson: rename included C source files to .c.incPaolo Bonzini2020-08-211-1/+1
* target/arm: Fix mtedesc for do_mem_zpzRichard Henderson2020-07-131-1/+1
* target/arm: Fix temp double-free in sve ldr/strRichard Henderson2020-07-031-6/+2Star
* target/arm: Add mte helpers for sve scatter/gather memory opsRichard Henderson2020-06-261-222/+440
* target/arm: Handle TBI for sve scalar + int memory opsRichard Henderson2020-06-261-2/+4
* target/arm: Add mte helpers for sve scalar + int ff/nf loadsRichard Henderson2020-06-261-88/+172
* target/arm: Add mte helpers for sve scalar + int storesRichard Henderson2020-06-261-55/+107
* target/arm: Add mte helpers for sve scalar + int loadsRichard Henderson2020-06-261-59/+141
* target/arm: Tidy trans_LD1R_zpriRichard Henderson2020-06-261-5/+7
* target/arm: Use mte_check1 for sve LD1RRichard Henderson2020-06-261-2/+4
* target/arm: Use mte_checkN for sve unpredicated storesRichard Henderson2020-06-261-28/+33
* target/arm: Use mte_checkN for sve unpredicated loadsRichard Henderson2020-06-261-28/+33
* target/arm: Fix tcg_gen_gvec_dup_imm vs DUP (indexed)Richard Henderson2020-05-111-1/+5
* target/arm: Use tcg_gen_gvec_5_ptr for sve FMLA/FCMLARichard Henderson2020-05-111-46/+24Star
* target/arm: Remove sve_memopidxRichard Henderson2020-05-111-14/+3Star
* target/arm: Use tcg_gen_gvec_dup_immRichard Henderson2020-05-061-7/+5Star
* tcg: Search includes from the project root source directoryPhilippe Mathieu-Daudé2020-01-161-3/+3
* tcg: TCGMemOp is now accelerator independent MemOpTony Nguyen2019-09-031-1/+1
* tcg: Specify optional vector requirements with a listRichard Henderson2019-05-131-4/+5
* decodetree: Add DisasContext argument to !function expandersRichard Henderson2019-05-061-12/+12
* target/arm: Check access permission to ADDVL/ADDPL/RDVLAmir Charif2019-03-151-8/+14
* target/arm: Rely on optimization within tcg_gen_gvec_orRichard Henderson2019-02-151-5/+1Star
* decodetree: Remove "insn" argument from trans_* expandersRichard Henderson2018-10-311-263/+244Star
* target/arm: Pass TCGMemOpIdx to sve memory helpersRichard Henderson2018-10-081-23/+44
* target/arm: Rewrite vector gather first-fault loadsRichard Henderson2018-10-081-42/+42
* target/arm: Rewrite vector gather storesRichard Henderson2018-10-081-25/+49
* target/arm: Rewrite vector gather loadsRichard Henderson2018-10-081-81/+167
* target/arm: Split contiguous stores for endiannessRichard Henderson2018-10-081-17/+55
* target/arm: Split contiguous loads for endiannessRichard Henderson2018-10-081-71/+143
* target/arm: Clear unused predicate bits for LD1RQRichard Henderson2018-10-081-1/+22
* target/arm: Use FZ not FZ16 for SVE FCVT single-half and double-halfRichard Henderson2018-08-161-2/+2
* target/arm: Fix offset scaling for LD_zprr and ST_zprrRichard Henderson2018-08-161-3/+2Star
* target/arm: Fix offset for LD1R instructionsRichard Henderson2018-08-161-1/+2
* target/arm: Fix sign-extension in sve do_ldr/do_strRichard Henderson2018-08-161-10/+8Star
* target/arm: Reorganize SVE WHILERichard Henderson2018-08-141-17/+32
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