| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | target/arm: Implement ESB instruction | Richard Henderson | 2022-05-09 | 1 | -0/+23 |
| * | target/arm: Avoid bare abort() or assert(0) | Richard Henderson | 2022-05-05 | 1 | -2/+2 |
| * | target/arm: Reorg ARMCPRegInfo type field bits | Richard Henderson | 2022-05-05 | 1 | -2/+4 |
| * | target/arm: Split out cpregs.h | Richard Henderson | 2022-05-05 | 1 | -2/+1 |
| * | target/arm: Use tcg_constant in trans_CSEL | Richard Henderson | 2022-04-28 | 1 | -4/+3 |
| * | target/arm: Use tcg_constant in trans_CPS_v7m | Richard Henderson | 2022-04-28 | 1 | -6/+3 |
| * | target/arm: Use tcg_constant in CLRM, DLS, WLS, LE | Richard Henderson | 2022-04-28 | 1 | -11/+5 |
| * | target/arm: Use tcg_constant in LDM, STM | Richard Henderson | 2022-04-28 | 1 | -8/+4 |
| * | target/arm: Use tcg_constant for TT, SAT, SMMLA | Richard Henderson | 2022-04-28 | 1 | -9/+5 |
| * | target/arm: Use tcg_constant for v7m MRS, MSR | Richard Henderson | 2022-04-28 | 1 | -4/+3 |
| * | target/arm: Use tcg_constant for MOVW, UMAAL, CRC32 | Richard Henderson | 2022-04-28 | 1 | -8/+3 |
| * | target/arm: Use tcg_constant for op_s_{rri,rxi}_rot | Richard Henderson | 2022-04-28 | 1 | -6/+5 |
| * | target/arm: Use tcg_constant for gen_srs | Richard Henderson | 2022-04-28 | 1 | -6/+2 |
| * | target/arm: Use tcg_constant for do_coproc_insn | Richard Henderson | 2022-04-28 | 1 | -30/+13 |
| * | target/arm: Use tcg_constant for vector shift expanders | Richard Henderson | 2022-04-28 | 1 | -18/+9 |
| * | target/arm: Use tcg_constant for gen_{msr,mrs} | Richard Henderson | 2022-04-28 | 1 | -13/+9 |
| * | target/arm: Use tcg_constant for disas_iwmmxt_insn | Richard Henderson | 2022-04-28 | 1 | -15/+10 |
| * | target/arm: Use tcg_constant for aa32 exceptions | Richard Henderson | 2022-04-28 | 1 | -25/+7 |
| * | target/arm: Simplify aa32 DISAS_WFI | Richard Henderson | 2022-04-22 | 1 | -8/+4 |
| * | target/arm: Simplify gen_sar | Richard Henderson | 2022-04-22 | 1 | -5/+3 |
| * | target/arm: Simplify GEN_SHIFT in translate.c | Richard Henderson | 2022-04-22 | 1 | -10/+8 |
| * | target/arm: Split out gen_rebuild_hflags | Richard Henderson | 2022-04-22 | 1 | -16/+24 |
| * | target/arm: Extend store_cpu_offset to take field size | Richard Henderson | 2022-04-22 | 1 | -1/+20 |
| * | target/arm: Change DisasContext.aarch64 to bool | Richard Henderson | 2022-04-22 | 1 | -1/+1 |
| * | exec/translator: Pass the locked filepointer to disas_log hook | Richard Henderson | 2022-04-20 | 1 | -3/+4 |
| * | Replace config-time define HOST_WORDS_BIGENDIAN | Marc-André Lureau | 2022-04-06 | 1 | -1/+1 |
| * | exec/memop: Adding signedness to quad definitions | Frédéric Pétrot | 2022-01-08 | 1 | -1/+1 |
| * | target/arm: Assert thumb pc is aligned | Richard Henderson | 2021-12-15 | 1 | -0/+3 |
| * | target/arm: Take an exception if PC is misaligned | Richard Henderson | 2021-12-15 | 1 | -1/+21 |
| * | target/arm: Split arm_pre_translate_insn | Richard Henderson | 2021-12-15 | 1 | -3/+7 |
| * | target/arm: Hoist pc_next to a local variable in thumb_tr_translate_insn | Richard Henderson | 2021-12-15 | 1 | -8/+8 |
| * | target/arm: Hoist pc_next to a local variable in arm_tr_translate_insn | Richard Henderson | 2021-12-15 | 1 | -4/+5 |
| * | target/arm: Use tcg_constant_i32() in gen_rev16() | Philippe Mathieu-Daudé | 2021-11-02 | 1 | -2/+1 |
| * | target/arm: Use the constant variant of store_cpu_field() when possible | Philippe Mathieu-Daudé | 2021-11-02 | 1 | -15/+6 |
| * | target/arm: Use tcg_constant_i32() in op_smlad() | Philippe Mathieu-Daudé | 2021-11-02 | 1 | -2/+1 |
| * | target/arm: Drop checks for singlestep_enabled | Richard Henderson | 2021-10-16 | 1 | -30/+6 |
| * | target/arm: Add TB flag for "MVE insns not predicated" | Peter Maydell | 2021-09-21 | 1 | -0/+8 |
| * | target/arm: Avoid goto_tb if we're trying to exit to the main loop | Peter Maydell | 2021-09-21 | 1 | -1/+33 |
| * | accel/tcg: Add DisasContextBase argument to translator_ld* | Ilya Leoshkevich | 2021-09-14 | 1 | -4/+5 |
| * | target/arm: Take an exception if PSTATE.IL is set | Peter Maydell | 2021-09-13 | 1 | -0/+21 |
| * | target/arm: Implement HSTR.TJDBX | Peter Maydell | 2021-08-26 | 1 | -0/+12 |
| * | target/arm: Implement M-profile trapping on division by zero | Peter Maydell | 2021-08-25 | 1 | -2/+2 |
| * | target/arm: Implement MVE VCTP | Peter Maydell | 2021-08-25 | 1 | -0/+33 |
| * | target/arm: Enforce that M-profile SP low 2 bits are always zero | Peter Maydell | 2021-07-27 | 1 | -0/+3 |
| * | accel/tcg: Remove TranslatorOps.breakpoint_check | Richard Henderson | 2021-07-21 | 1 | -29/+0 |
| * | target/arm: Use translator_use_goto_tb for aarch32 | Richard Henderson | 2021-07-09 | 1 | -11/+1 |
| * | target/arm: Use DISAS_TOO_MANY for ISB and SB | Richard Henderson | 2021-07-09 | 1 | -2/+2 |
| * | tcg: Avoid including 'trace-tcg.h' in target translate.c | Philippe Mathieu-Daudé | 2021-07-09 | 1 | -1/+0 |
| * | target/arm: Implement MVE shifts by register | Peter Maydell | 2021-07-02 | 1 | -0/+30 |
| * | target/arm: Implement MVE shifts by immediate | Peter Maydell | 2021-07-02 | 1 | -2/+66 |
