| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | target/arm: Add TB flag for "MVE insns not predicated" | Peter Maydell | 2021-09-21 | 1 | -0/+2 |
| * | target/arm: Take an exception if PSTATE.IL is set | Peter Maydell | 2021-09-13 | 1 | -0/+2 |
| * | target/arm: Implement MVE VADD (floating-point) | Peter Maydell | 2021-09-01 | 1 | -0/+6 |
| * | target/arm: Implement MVE shifts by register | Peter Maydell | 2021-07-02 | 1 | -0/+1 |
| * | target/arm: Implement MVE shifts by immediate | Peter Maydell | 2021-07-02 | 1 | -0/+1 |
| * | target/arm: Implement MVE long shifts by register | Peter Maydell | 2021-07-02 | 1 | -0/+1 |
| * | target/arm: Implement MVE long shifts by immediate | Peter Maydell | 2021-07-02 | 1 | -0/+1 |
| * | target/arm: Implement MVE vector shift right by immediate insns | Peter Maydell | 2021-07-02 | 1 | -0/+20 |
| * | target/arm: Use asimd_imm_const for A64 decode | Peter Maydell | 2021-07-02 | 1 | -1/+2 |
| * | target/arm: Make asimd_imm_const() public | Peter Maydell | 2021-07-02 | 1 | -0/+16 |
| * | target/arm: Implement MVE VMLALDAV | Peter Maydell | 2021-06-21 | 1 | -0/+10 |
| * | target/arm: Add handling for PSR.ECI/ICI | Peter Maydell | 2021-06-16 | 1 | -0/+9 |
| * | target/arm: Move NeonGenThreeOpEnvFn typedef to translate.h | Peter Maydell | 2021-05-10 | 1 | -0/+2 |
| * | target/arm: Share unallocated_encoding() and gen_exception_insn() | Peter Maydell | 2021-05-10 | 1 | -0/+3 |
| * | target/arm: Move constant expanders to translate.h | Peter Maydell | 2021-05-10 | 1 | -0/+24 |
| * | target/arm: Enforce alignment for VLDn (all lanes) | Richard Henderson | 2021-04-30 | 1 | -0/+1 |
| * | target/arm: Adjust gen_aa32_{ld, st}_i32 for align+endianness | Richard Henderson | 2021-04-30 | 1 | -0/+24 |
| * | target/arm: Add ALIGN_MEM to TBFLAG_ANY | Richard Henderson | 2021-04-30 | 1 | -0/+2 |
| * | target/arm: Move mode specific TB flags to tb->cs_base | Richard Henderson | 2021-04-30 | 1 | -1/+1 |
| * | target/arm: Introduce CPUARMTBFlags | Richard Henderson | 2021-04-30 | 1 | -0/+11 |
| * | target/arm: Rearrange {sve,fp}_check_access assert | Richard Henderson | 2020-08-28 | 1 | -0/+1 |
| * | target/arm: Implement FPST_STD_F16 fpstatus | Peter Maydell | 2020-08-24 | 1 | -1/+2 |
| * | target/arm: Replace A64 get_fpstatus_ptr() with generic fpstatus_ptr() | Peter Maydell | 2020-08-24 | 1 | -0/+51 |
| * | target/arm: Implement the LDGM, STGM, STZGM instructions | Richard Henderson | 2020-06-26 | 1 | -0/+2 |
| * | target/arm: Add MTE bits to tb_flags | Richard Henderson | 2020-06-26 | 1 | -0/+5 |
| * | target/arm: Add DISAS_UPDATE_NOCHAIN | Richard Henderson | 2020-06-26 | 1 | -0/+2 |
| * | target/arm: Rename DISAS_UPDATE to DISAS_UPDATE_EXIT | Richard Henderson | 2020-06-26 | 1 | -6/+8 |
| * | target/arm: Convert simple fp Neon 2-reg-misc insns | Peter Maydell | 2020-06-23 | 1 | -0/+1 |
| * | target/arm: Convert Neon 2-reg-misc VREV32 and VREV16 to decodetree | Peter Maydell | 2020-06-23 | 1 | -0/+1 |
| * | target/arm: Fix capitalization in NeonGenTwo{Single, Double}OPFn typedefs | Peter Maydell | 2020-06-23 | 1 | -2/+2 |
| * | target/arm: Rename NeonGenOneOpFn to NeonGenOne64OpFn | Peter Maydell | 2020-06-23 | 1 | -1/+1 |
| * | target/arm: Convert Neon 3-reg-diff VABAL, VABDL to decodetree | Peter Maydell | 2020-06-16 | 1 | -0/+1 |
| * | target/arm: Vectorize SABA/UABA | Richard Henderson | 2020-05-14 | 1 | -0/+5 |
| * | target/arm: Vectorize SABD/UABD | Richard Henderson | 2020-05-14 | 1 | -0/+5 |
| * | target/arm: Create gen_gvec_{qrdmla,qrdmls} | Richard Henderson | 2020-05-14 | 1 | -0/+5 |
| * | target/arm: Create gen_gvec_{uqadd, sqadd, uqsub, sqsub} | Richard Henderson | 2020-05-14 | 1 | -4/+9 |
| * | target/arm: Create gen_gvec_{cmtst,ushl,sshl} | Richard Henderson | 2020-05-14 | 1 | -3/+7 |
| * | target/arm: Create gen_gvec_{mla,mls} | Richard Henderson | 2020-05-14 | 1 | -2/+5 |
| * | target/arm: Create gen_gvec_{ceq,clt,cle,cgt,cge}0 | Richard Henderson | 2020-05-14 | 1 | -5/+11 |
| * | target/arm: Create gen_gvec_{sri,sli} | Richard Henderson | 2020-05-14 | 1 | -2/+5 |
| * | target/arm: Create gen_gvec_{u,s}{rshr,rsra} | Richard Henderson | 2020-05-14 | 1 | -0/+9 |
| * | target/arm: Create gen_gvec_[us]sra | Richard Henderson | 2020-05-14 | 1 | -2/+5 |
| * | target/arm: Move gen_ function typedefs to translate.h | Peter Maydell | 2020-05-04 | 1 | -0/+17 |
| * | target/arm: Convert Neon 3-reg-same VADD/VSUB to decodetree | Peter Maydell | 2020-05-04 | 1 | -0/+9 |
| * | target/arm: Vectorize integer comparison vs zero | Richard Henderson | 2020-04-30 | 1 | -0/+5 |
| * | target/arm: Vectorize USHL and SSHL | Richard Henderson | 2020-02-21 | 1 | -0/+6 |
| * | target/arm: Update get_a64_user_mem_index for VHE | Richard Henderson | 2020-02-07 | 1 | -0/+2 |
| * | target/arm: Rename ARMMMUIdx_S1SE[01] to ARMMMUIdx_SE10_[01] | Richard Henderson | 2020-02-07 | 1 | -1/+1 |
| * | target/arm: Handle AArch32 CP15 trapping via HSTR_EL2 | Marc Zyngier | 2019-12-16 | 1 | -0/+2 |
| * | Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190903' into staging | Peter Maydell | 2019-09-04 | 1 | -1/+1 |
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