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path: root/target/arm/translate.h
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* target/arm: Move NeonGenThreeOpEnvFn typedef to translate.hPeter Maydell2021-05-101-0/+2
* target/arm: Share unallocated_encoding() and gen_exception_insn()Peter Maydell2021-05-101-0/+3
* target/arm: Move constant expanders to translate.hPeter Maydell2021-05-101-0/+24
* target/arm: Enforce alignment for VLDn (all lanes)Richard Henderson2021-04-301-0/+1
* target/arm: Adjust gen_aa32_{ld, st}_i32 for align+endiannessRichard Henderson2021-04-301-0/+24
* target/arm: Add ALIGN_MEM to TBFLAG_ANYRichard Henderson2021-04-301-0/+2
* target/arm: Move mode specific TB flags to tb->cs_baseRichard Henderson2021-04-301-1/+1
* target/arm: Introduce CPUARMTBFlagsRichard Henderson2021-04-301-0/+11
* target/arm: Rearrange {sve,fp}_check_access assertRichard Henderson2020-08-281-0/+1
* target/arm: Implement FPST_STD_F16 fpstatusPeter Maydell2020-08-241-1/+2
* target/arm: Replace A64 get_fpstatus_ptr() with generic fpstatus_ptr()Peter Maydell2020-08-241-0/+51
* target/arm: Implement the LDGM, STGM, STZGM instructionsRichard Henderson2020-06-261-0/+2
* target/arm: Add MTE bits to tb_flagsRichard Henderson2020-06-261-0/+5
* target/arm: Add DISAS_UPDATE_NOCHAINRichard Henderson2020-06-261-0/+2
* target/arm: Rename DISAS_UPDATE to DISAS_UPDATE_EXITRichard Henderson2020-06-261-6/+8
* target/arm: Convert simple fp Neon 2-reg-misc insnsPeter Maydell2020-06-231-0/+1
* target/arm: Convert Neon 2-reg-misc VREV32 and VREV16 to decodetreePeter Maydell2020-06-231-0/+1
* target/arm: Fix capitalization in NeonGenTwo{Single, Double}OPFn typedefsPeter Maydell2020-06-231-2/+2
* target/arm: Rename NeonGenOneOpFn to NeonGenOne64OpFnPeter Maydell2020-06-231-1/+1
* target/arm: Convert Neon 3-reg-diff VABAL, VABDL to decodetreePeter Maydell2020-06-161-0/+1
* target/arm: Vectorize SABA/UABARichard Henderson2020-05-141-0/+5
* target/arm: Vectorize SABD/UABDRichard Henderson2020-05-141-0/+5
* target/arm: Create gen_gvec_{qrdmla,qrdmls}Richard Henderson2020-05-141-0/+5
* target/arm: Create gen_gvec_{uqadd, sqadd, uqsub, sqsub}Richard Henderson2020-05-141-4/+9
* target/arm: Create gen_gvec_{cmtst,ushl,sshl}Richard Henderson2020-05-141-3/+7
* target/arm: Create gen_gvec_{mla,mls}Richard Henderson2020-05-141-2/+5
* target/arm: Create gen_gvec_{ceq,clt,cle,cgt,cge}0Richard Henderson2020-05-141-5/+11
* target/arm: Create gen_gvec_{sri,sli}Richard Henderson2020-05-141-2/+5
* target/arm: Create gen_gvec_{u,s}{rshr,rsra}Richard Henderson2020-05-141-0/+9
* target/arm: Create gen_gvec_[us]sraRichard Henderson2020-05-141-2/+5
* target/arm: Move gen_ function typedefs to translate.hPeter Maydell2020-05-041-0/+17
* target/arm: Convert Neon 3-reg-same VADD/VSUB to decodetreePeter Maydell2020-05-041-0/+9
* target/arm: Vectorize integer comparison vs zeroRichard Henderson2020-04-301-0/+5
* target/arm: Vectorize USHL and SSHLRichard Henderson2020-02-211-0/+6
* target/arm: Update get_a64_user_mem_index for VHERichard Henderson2020-02-071-0/+2
* target/arm: Rename ARMMMUIdx_S1SE[01] to ARMMMUIdx_SE10_[01]Richard Henderson2020-02-071-1/+1
* target/arm: Handle AArch32 CP15 trapping via HSTR_EL2Marc Zyngier2019-12-161-0/+2
* Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190903' into stagingPeter Maydell2019-09-041-1/+1
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| * tcg: TCGMemOp is now accelerator independent MemOpTony Nguyen2019-09-031-1/+1
* | Revert "target/arm: Use unallocated_encoding for aarch32"Richard Henderson2019-09-031-2/+0Star
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* target/arm: Use unallocated_encoding for aarch32Richard Henderson2019-08-161-0/+2
* target/arm: Replace s->pc with s->base.pc_nextRichard Henderson2019-08-161-1/+0Star
* target/arm: Introduce pc_currRichard Henderson2019-08-161-0/+2
* target/arm: Fix routing of singlestep exceptionsPeter Maydell2019-08-161-4/+11
* target/arm: Factor out 'generate singlestep exception' functionPeter Maydell2019-08-161-0/+23
* target/arm: Move CPU state dumping routines to cpu.cPhilippe Mathieu-Daudé2019-07-011-5/+0Star
* target/arm: Move vfp_expand_imm() to translate.[ch]Peter Maydell2019-06-171-0/+7
* target/arm: Use tcg_gen_gvec_bitselRichard Henderson2019-06-131-3/+0Star
* target/arm: Implement M-profile lazy FP state preservationPeter Maydell2019-04-291-0/+1
* target/arm: Activate M-profile floating point context when FPCCR.ASPEN is setPeter Maydell2019-04-291-0/+1