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* target/arm: fix decoding of B{,L}RA{A,B}Remi Denis-Courmont2019-02-011-1/+1
* target/arm: fix AArch64 virtual address space sizeRemi Denis-Courmont2019-02-011-1/+1
* target/arm: Always enable pac keys for user-onlyRichard Henderson2019-02-012-60/+3Star
* arm: Clarify the logic of set_pc()Julia Suvorova2019-02-013-19/+25
* target/arm: Enable API, APK bits in SCR, HCRRichard Henderson2019-02-011-0/+6
* target/arm: Add a timer to predict PMU counter overflowAaron Lindsay OS2019-02-013-2/+92
* target/arm: Send interrupts on PMU counter overflowAaron Lindsay OS2019-02-011-10/+51
* target/arm/translate-a64: Fix mishandling of size in FCMLA decodePeter Maydell2019-02-011-1/+1
* target/arm/translate-a64: Fix FCMLA decoding errorPeter Maydell2019-02-011-1/+1
* target/arm/translate-a64: Don't underdecode SDOT and UDOTPeter Maydell2019-02-011-1/+1
* target/arm/translate-a64: Don't underdecode FP insnsPeter Maydell2019-02-011-1/+21
* target/arm/translate-a64: Don't underdecode add/sub extended registerPeter Maydell2019-02-011-1/+2
* target/arm/translate-a64: Don't underdecode SIMD ld/st singlePeter Maydell2019-02-011-1/+10
* target/arm/translate-a64: Don't underdecode SIMD ld/st multiplePeter Maydell2019-02-011-1/+6
* target/arm/translate-a64: Don't underdecode PRFMPeter Maydell2019-02-011-1/+1
* target/arm/translate-a64: Don't underdecode system instructionsPeter Maydell2019-02-011-1/+5
* target/arm: Don't clear supported PMU events when initializing PMCEID1Aaron Lindsay OS2019-01-293-19/+22
* target/arm: v8m: Ensure IDAU is respected if SAU is disabledThomas Roth2019-01-291-9/+10
* target/arm: Fix validation of 32-bit address spaces for aa32Richard Henderson2019-01-291-7/+14
* target/arm: Implement PMSWINCAaron Lindsay2019-01-211-2/+37
* target/arm: PMU: Set PMCR.N to 4Aaron Lindsay2019-01-211-5/+5
* target/arm: PMU: Add instruction and cycle eventsAaron Lindsay2019-01-211-46/+44Star
* target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPERAaron Lindsay2019-01-212-17/+282
* target/arm: Add array for supported PMU events, generate PMCEID[01]_EL0Aaron Lindsay2019-01-214-11/+79
* target/arm: Make PMCEID[01]_EL0 64 bit registers, add PMCEID[23]Aaron Lindsay2019-01-212-4/+19
* target/arm: Define FIELDs for ID_DFR0Aaron Lindsay2019-01-211-0/+9
* target/arm: Implement PMOVSSETAaron Lindsay2019-01-211-0/+28
* target/arm: Allow AArch32 access for PMCCFILTRAaron Lindsay2019-01-211-1/+26
* target/arm: Filter cycle counter based on PMCCFILTR_EL0Aaron Lindsay2019-01-213-8/+101
* target/arm: Swap PMU values before/after migrationsAaron Lindsay2019-01-212-2/+28
* target/arm: Reorganize PMCCNTR accessesAaron Lindsay2019-01-212-53/+98
* target/arm: Tidy TBI handling in gen_a64_set_pcRichard Henderson2019-01-211-43/+23Star
* target/arm: Enable PAuth for user-onlyRichard Henderson2019-01-212-0/+63
* target/arm: Enable PAuth for -cpu maxRichard Henderson2019-01-211-0/+4
* target/arm: Add PAuth system registersRichard Henderson2019-01-211-0/+70
* target/arm: Implement pauth_computepacRichard Henderson2019-01-211-1/+241
* target/arm: Implement pauth_addpacRichard Henderson2019-01-211-1/+41
* target/arm: Implement pauth_authRichard Henderson2019-01-211-1/+20
* target/arm: Implement pauth_stripRichard Henderson2019-01-211-1/+13
* target/arm: Reuse aa64_va_parameters for setting tbflagsRichard Henderson2019-01-212-81/+24Star
* target/arm: Decode TBID from TCRRichard Henderson2019-01-212-3/+12
* target/arm: Add aa64_va_parameters_bothRichard Henderson2019-01-212-5/+20
* target/arm: Export aa64_va_parameters to internals.hRichard Henderson2019-01-212-2/+19
* target/arm: Merge TBFLAG_AA_TB{0, 1} to TBIIRichard Henderson2019-01-214-13/+11Star
* target/arm: Create ARMVAParameters and helpersRichard Henderson2019-01-212-128/+164
* target/arm: Introduce arm_stage1_mmu_idxRichard Henderson2019-01-212-0/+22
* target/arm: Introduce arm_mmu_idxRichard Henderson2019-01-213-12/+32
* target/arm: Move cpu_mmu_index out of lineRichard Henderson2019-01-212-43/+49
* target/arm: Decode Load/store register (pac)Richard Henderson2019-01-211-0/+61
* target/arm: Decode PAuth within disas_uncond_b_regRichard Henderson2019-01-211-1/+81