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* target/avr: Drop avr_cpu_memory_rw_debug()Bin Meng2022-06-203-9/+0Star
* Clean up decorations and whitespace around header guardsMarkus Armbruster2022-05-111-1/+1
* Clean up header guards that don't match their file nameMarkus Armbruster2022-05-111-3/+3
* exec/translator: Pass the locked filepointer to disas_log hookRichard Henderson2022-04-201-3/+4
* target: Use ArchCPU as interface to target CPUPhilippe Mathieu-Daudé2022-03-061-1/+1
* target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macroPhilippe Mathieu-Daudé2022-03-062-6/+3Star
* target: Use CPUArchState as interface to target-specific CPU statePhilippe Mathieu-Daudé2022-03-061-5/+2Star
* Merge remote-tracking branch 'remotes/lvivier-gitlab/tags/trivial-branch-for-...Peter Maydell2022-02-221-1/+0Star
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| * target/avr: Correct AVRCPUClass docstringPhilippe Mathieu-Daudé2022-02-211-1/+0Star
* | exec/exec-all: Move 'qemu/log.h' include in units requiring itPhilippe Mathieu-Daudé2022-02-211-0/+1
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* target/avr: Drop checks for singlestep_enabledRichard Henderson2021-10-161-15/+4Star
* include/exec: Move cpu_signal_handler declarationRichard Henderson2021-09-221-2/+0Star
* Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.2-pul...Peter Maydell2021-09-161-5/+3Star
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| * target/avr: Fix compiler errors (-Werror=enum-conversion)Stefan Weil2021-09-161-5/+3Star
* | target/avr: Remove pointless use of CONFIG_USER_ONLY definitionPhilippe Mathieu-Daudé2021-09-141-3/+0Star
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* accel/tcg: Remove TranslatorOps.breakpoint_checkRichard Henderson2021-07-211-18/+0Star
* target/avr: Implement gdb_adjust_breakpointRichard Henderson2021-07-214-14/+15
* Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210710' into...Peter Maydell2021-07-122-7/+10
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| * target/avr: Mark some helpers noreturnRichard Henderson2021-07-091-4/+4
| * target/avr: Use translator_use_goto_tbRichard Henderson2021-07-091-3/+6
* | meson: Introduce target-specific KconfigPhilippe Mathieu-Daudé2021-07-091-0/+2
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* target/avr: Convert to TranslatorOpsRichard Henderson2021-06-291-104/+126
* target/avr: Change ctx to DisasContext* in gen_intermediate_codeRichard Henderson2021-06-291-41/+43
* target/avr: Add DisasContextBase to DisasContextRichard Henderson2021-06-291-29/+29
* hw/core: Constify TCGCPUOpsRichard Henderson2021-05-271-1/+1
* cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOpsPhilippe Mathieu-Daudé2021-05-271-1/+1
* cpu: Introduce SysemuCPUOps structurePhilippe Mathieu-Daudé2021-05-271-0/+6
* cpu: Move AVR target vmsd field from CPUClass to DeviceClassPhilippe Mathieu-Daudé2021-05-272-3/+3
* cpu: Rename CPUClass vmsd -> legacy_vmsdPhilippe Mathieu-Daudé2021-05-271-1/+1
* target/avr: Ignore unimplemented WDR opcodePhilippe Mathieu-Daudé2021-05-131-5/+1Star
* target/avr: Fix interrupt executionIvanov Arkasha2021-03-151-1/+3
* target/avr: Fix some comment spelling errorsLichang Zhao2021-03-151-3/+3
* target/avr/cpu: Use device_class_set_parent_realize()Philippe Mathieu-Daudé2021-02-201-3/+1Star
* cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClassClaudio Fontana2021-02-052-7/+17
* cpu: move cc->do_interrupt to tcg_opsClaudio Fontana2021-02-052-3/+3
* cpu: Move tlb_fill to tcg_opsEduardo Habkost2021-02-051-1/+1
* cpu: Move cpu_exec_* to tcg_opsEduardo Habkost2021-02-051-1/+1
* cpu: Move synchronize_from_tb() to tcg_opsEduardo Habkost2021-02-051-1/+1
* cpu: Introduce TCGCpuOperations structEduardo Habkost2021-02-051-1/+1
* tcg: Make tb arg to synchronize_from_tb constRichard Henderson2021-01-071-1/+2
* migration: Replace migration's JSON writer by the general oneMarkus Armbruster2020-12-191-2/+2
* qom: Remove module_obj_name parameter from OBJECT_DECLARE* macrosEduardo Habkost2020-09-181-1/+1
* Use OBJECT_DECLARE_TYPE where possibleEduardo Habkost2020-09-091-4/+2Star
* Use DECLARE_*CHECKER* macrosEduardo Habkost2020-09-091-6/+2Star
* Move QOM typedefs and add missing includesEduardo Habkost2020-09-091-3/+5
* meson: targetPaolo Bonzini2020-08-214-36/+22Star
* meson: rename included C source files to .c.incPaolo Bonzini2020-08-213-4/+4
* target/avr/disas: Fix store instructions display orderPhilippe Mathieu-Daudé2020-07-111-10/+10
* target/avr/cpu: Fix $PC displayed addressPhilippe Mathieu-Daudé2020-07-111-1/+1
* target/avr/cpu: Drop tlb_flush() in avr_cpu_reset()Philippe Mathieu-Daudé2020-07-111-2/+0Star
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