summaryrefslogtreecommitdiffstats
path: root/target/i386/tcg
Commit message (Expand)AuthorAgeFilesLines
* target/i386: use CPU_LOG_INT for IRQ servicingAlex Bennée2022-02-091-2/+2
* exec/memop: Adding signedness to quad definitionsFrédéric Pétrot2022-01-082-19/+19
* target/i386: Use assert() to sanity-check b1 in SSE decodePeter Maydell2021-12-151-9/+3Star
* target-i386: mmu: fix handling of noncanonical virtual addressesPaolo Bonzini2021-11-081-9/+12
* target-i386: mmu: use pg_mode instead of HF_LMA_MASKPaolo Bonzini2021-11-081-2/+2
* target/i386: Implement x86_cpu_record_sigsegvRichard Henderson2021-11-023-7/+25
* target/i386: Drop check for singlestep_enabledRichard Henderson2021-10-162-11/+1Star
* target/i386: Check CF_NO_GOTO_TB for dc->jmp_optRichard Henderson2021-10-161-2/+3
* target/i386: Use MO_128 for 16 byte atomicsRichard Henderson2021-10-131-1/+1
* tcg: Rename TCGMemOpIdx to MemOpIdxRichard Henderson2021-10-061-2/+2
* target/i386: Move x86_cpu_exec_interrupt() under sysemu/ folderPhilippe Mathieu-Daudé2021-09-142-64/+62Star
* target/i386: Restrict cpu_exec_interrupt() handler to sysemuPhilippe Mathieu-Daudé2021-09-143-9/+5Star
* accel/tcg: Rename user-mode do_interrupt hack as fake_user_interruptPhilippe Mathieu-Daudé2021-09-141-2/+4
* target/i386: Simplify TARGET_X86_64 #ifdef'ryPhilippe Mathieu-Daudé2021-09-141-3/+1Star
* accel/tcg: Add DisasContextBase argument to translator_ld*Ilya Leoshkevich2021-09-141-5/+5
* target/i386: Added vVMLOAD and vVMSAVE featureLara Lazier2021-09-132-1/+30
* target/i386: Added changed priority check for VIRQLara Lazier2021-09-132-15/+7Star
* target/i386: Added ignore TPR check in ctl_has_irqLara Lazier2021-09-131-0/+5
* target/i386: Added VGIF V_IRQ masking capabilityLara Lazier2021-09-131-0/+12
* target/i386: Moved int_ctl into CPUX86State structureLara Lazier2021-09-133-36/+18Star
* target/i386: Added VGIF featureLara Lazier2021-09-131-2/+29
* target/i386: VMRUN and VMLOAD canonicalizationsLara Lazier2021-09-131-10/+17
* target/i386: Fixed size of constant for WindowsLara Lazier2021-08-132-2/+2
* target/i386: fix typo in ctl_has_irqPaolo Bonzini2021-07-291-1/+1
* target/i386: Added consistency checks for event injectionLara Lazier2021-07-291-0/+6
* i386: do not call cpudef-only models functions for max, host, baseClaudio Fontana2021-07-231-3/+8
* target/i386: Added consistency checks for CR3Lara Lazier2021-07-232-3/+14
* Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...Peter Maydell2021-07-222-4/+59
|\
| * target/i386: Added consistency checks for EFERLara Lazier2021-07-221-0/+39
| * target/i386: Added consistency checks for CR4Lara Lazier2021-07-222-3/+9
| * target/i386: Added V_INTR_PRIO check to virtual interruptsLara Lazier2021-07-221-1/+11
* | accel/tcg: Remove TranslatorOps.breakpoint_checkRichard Henderson2021-07-211-28/+0Star
* | target/i386: Implement debug_check_breakpointRichard Henderson2021-07-211-0/+12
* | tcg: Rename helper_atomic_*_mmu and provide for user-onlyRichard Henderson2021-07-211-13/+2Star
|/
* target/i386: Correct implementation for FCS, FIP, FDS and FDPZiqiao Kong2021-07-132-9/+54
* target/i386: Split out do_fninitRichard Henderson2021-07-131-14/+8Star
* target/i386: Trivial code motion and code style fixZiqiao Kong2021-07-131-435/+446
* target/i386: Tidy hw_breakpoint_removeDmitry Voronetskiy2021-07-131-2/+2
* Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210710' into...Peter Maydell2021-07-122-22/+5Star
|\
| * target/i386: Use cpu_breakpoint_test in breakpoint_handlerRichard Henderson2021-07-101-9/+3Star
| * target/i386: Use translator_use_goto_tbRichard Henderson2021-07-091-12/+2Star
| * tcg: Avoid including 'trace-tcg.h' in target translate.cPhilippe Mathieu-Daudé2021-07-091-1/+0Star
* | target/i386: fix exceptions for MOV to DRPaolo Bonzini2021-07-094-41/+32Star
* | target/i386: Added DR6 and DR7 consistency checksLara Lazier2021-07-091-1/+8
* | target/i386: Added MSRPM and IOPM size checkLara Lazier2021-07-091-0/+15
|/
* target/i386: Move X86XSaveArea into TCGDavid Edmondson2021-07-062-0/+58
* target/i386: Populate x86_ext_save_areas offsets using cpuid where possibleDavid Edmondson2021-07-061-0/+20
* target/i386: Improve bswap translationRichard Henderson2021-06-291-10/+4Star
* tcg: Add flags argument to tcg_gen_bswap16_*, tcg_gen_bswap32_i64Richard Henderson2021-06-291-1/+1
* target/i386: Added Intercept CR0 writes checkLara Lazier2021-06-161-0/+9
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-12-12 02:59:19 +0100