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* accel/tcg: Introduce tb_pc and log_pcRichard Henderson2022-10-041-1/+1
* hw/core: Add CPUClass.get_pcRichard Henderson2022-10-041-0/+9
* target/i386: introduce insn_get_addrPaolo Bonzini2022-09-191-10/+26
* target/i386: REPZ and REPNZ are mutually exclusivePaolo Bonzini2022-09-191-0/+2
* target/i386: fix INSERTQ implementationPaolo Bonzini2022-09-193-8/+18
* target/i386: correctly mask SSE4a bit indices in register operandsPaolo Bonzini2022-09-191-2/+2
* target/i386: Raise #GP on unaligned m128 accesses when required.Paolo Bonzini2022-09-186-29/+72
* target/i386: Make translator stop before the end of a pageIlya Leoshkevich2022-09-061-24/+38
* accel/tcg: Add pc and host_pc params to gen_intermediate_codeRichard Henderson2022-09-061-2/+3
* accel/tcg: Remove translator_ldswRichard Henderson2022-09-061-1/+1
* target/i386: AVX+AES helpers prepPaul Brook2022-09-011-19/+22
* target/i386: AVX pclmulqdq prepPaul Brook2022-09-011-7/+22
* target/i386: Rewrite blendv helpersPaul Brook2022-09-011-62/+24Star
* target/i386: Misc AVX helper prepPaul Brook2022-09-011-49/+94
* target/i386: Destructive FP helpers for AVXPaul Brook2022-09-011-58/+43Star
* target/i386: Dot product AVX helper prepPaul Brook2022-09-011-35/+45
* target/i386: reimplement AVX comparison helpersPaul Brook2022-09-013-69/+78
* target/i386: Floating point arithmetic helper AVX prepPaul Brook2022-09-011-41/+87
* target/i386: Destructive vector helpers for AVXPaul Brook2022-09-011-301/+269Star
* target/i386: Misc integer AVX helper prepPaul Brook2022-09-011-86/+82Star
* target/i386: Rewrite simple integer vector helpersPaul Brook2022-09-011-54/+27Star
* target/i386: Rewrite vector shift helperPaul Brook2022-09-011-131/+108Star
* target/i386: rewrite destructive 3DNow operationsPaolo Bonzini2022-09-011-16/+16
* target/i386: Add CHECK_NO_VEXPaul Brook2022-09-011-0/+26
* target/i386: do not cast gen_helper_* function pointersPaolo Bonzini2022-09-011-38/+37Star
* target/i386: Add size suffix to vector FP helpersPaolo Bonzini2022-09-013-66/+67
* target/i386: isolate MMX code morePaolo Bonzini2022-09-011-18/+32
* target/i386: check SSE table flags instead of hardcoding opcodesPaolo Bonzini2022-09-011-44/+31Star
* target/i386: Move 3DNOW decoderPaul Brook2022-09-011-13/+17
* target/i386: Rework sse_op_table6/7Paul Brook2022-09-011-100/+132
* target/i386: Rework sse_op_table1Paul Brook2022-09-011-130/+183
* target/i386: Add ZMM_OFFSET macroPaul Brook2022-09-011-33/+27Star
* target/i386: formatting fixesPaolo Bonzini2022-09-011-3/+4
* target/i386: do not use MOVL to move data between SSE registersPaolo Bonzini2022-09-011-2/+4
* target/i386: DPPS rounding fixPaolo Bonzini2022-09-011-32/+35
* target/i386: fix PHSUB* instructions with dest=srcPaolo Bonzini2022-09-011-20/+29
* i386: do kvm_put_msr_feature_control() first thing when vCPU is resetVitaly Kuznetsov2022-09-011-5/+12
* i386: reset KVM nested state upon CPU resetVitaly Kuznetsov2022-09-011-10/+27
* target/i386: display deprecation status in '-cpu help'Daniel P. Berrangé2022-08-051-0/+5
* misc: fix commonly doubled up wordsDaniel P. Berrangé2022-08-011-1/+1
* hvf: Enable RDTSCP supportCameron Esfahani2022-07-133-13/+23
* Fix 'writeable' typosPeter Maydell2022-06-083-3/+3
* x86: cpu: fixup number of addressable IDs for logical processors sharing cacheIgor Mammedov2022-06-061-4/+16
* x86: cpu: make sure number of addressable IDs for processor cores meets the specIgor Mammedov2022-06-061-1/+1
* target/i386: Fix wrong count settingYang Zhong2022-06-061-1/+1
* target/i386/tcg: Fix masking of real-mode addresses with A20 bitStephen Michael Jothen2022-06-061-1/+3
* i386: Hyper-V Direct TLB flush hypercallVitaly Kuznetsov2022-05-254-0/+12
* i386: Hyper-V Support extended GVA ranges for TLB flush hypercallsVitaly Kuznetsov2022-05-254-0/+12
* i386: Hyper-V XMM fast hypercall input featureVitaly Kuznetsov2022-05-254-1/+11
* i386: Hyper-V Enlightened MSR bitmap featureVitaly Kuznetsov2022-05-254-0/+15
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