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path: root/target/mips/cpu.c
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* target/mips: Make mips_cpu_tlb_fill sysemu onlyRichard Henderson2021-11-021-1/+1
* target/mips: Restrict cpu_exec_interrupt() handler to sysemuPhilippe Mathieu-Daudé2021-09-141-1/+1
* target/mips: Optimize regnames[] arraysPhilippe Mathieu-Daudé2021-06-241-1/+1
* hw/core: Constify TCGCPUOpsRichard Henderson2021-05-271-1/+1
* cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOpsPhilippe Mathieu-Daudé2021-05-271-1/+1
* cpu: Move CPUClass::vmsd to SysemuCPUOpsPhilippe Mathieu-Daudé2021-05-271-1/+1
* cpu: Introduce SysemuCPUOps structurePhilippe Mathieu-Daudé2021-05-271-0/+8
* cpu: Rename CPUClass vmsd -> legacy_vmsdPhilippe Mathieu-Daudé2021-05-271-1/+1
* target/mips: Move CP0 helpers to sysemu/cp0.cPhilippe Mathieu-Daudé2021-05-021-103/+0Star
* target/mips: Move exception management code to exception.cPhilippe Mathieu-Daudé2021-05-021-113/+0Star
* target/mips: Move Special opcodes to tcg/sysemu/special_helper.cPhilippe Mathieu-Daudé2021-05-021-17/+0Star
* target/mips: Restrict mmu_init() to TCGPhilippe Mathieu-Daudé2021-05-021-1/+1
* target/mips: Declare mips_env_set_pc() inlined in "internal.h"Philippe Mathieu-Daudé2021-05-021-7/+1Star
* target/mips: Turn printfpr() macro into a proper functionPhilippe Mathieu-Daudé2021-05-021-27/+23Star
* target/mips: Restrict mips_cpu_dump_state() to cpu.cPhilippe Mathieu-Daudé2021-05-021-0/+77
* target/mips: Optimize CPU/FPU regnames[] arraysPhilippe Mathieu-Daudé2021-05-021-1/+1
* target/mips: Make CPU/FPU regnames[] arrays globalPhilippe Mathieu-Daudé2021-05-021-0/+7
* Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-docs-xen-upda...Peter Maydell2021-03-111-1/+1
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| * semihosting: Move include/hw/semihosting/ -> include/semihosting/Philippe Mathieu-Daudé2021-03-101-1/+1
* | clock: Add ClockEvent parameter to callbacksPeter Maydell2021-03-081-1/+1
|/
* target/mips: Create mips_io_recompile_replay_branchRichard Henderson2021-02-181-0/+18
* cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClassClaudio Fontana2021-02-051-13/+23
* cpu: move do_unaligned_access to tcg_opsClaudio Fontana2021-02-051-1/+2
* cpu: move cc->transaction_failed to tcg_opsClaudio Fontana2021-02-051-1/+3
* cpu: move cc->do_interrupt to tcg_opsClaudio Fontana2021-02-051-2/+2
* cpu: Move tlb_fill to tcg_opsEduardo Habkost2021-02-051-1/+1
* cpu: Move cpu_exec_* to tcg_opsEduardo Habkost2021-02-051-1/+1
* cpu: Move synchronize_from_tb() to tcg_opsEduardo Habkost2021-02-051-1/+3
* cpu: Introduce TCGCpuOperations structEduardo Habkost2021-02-051-1/+1
* target/mips: Move msa_reset() to msa_helper.cPhilippe Mathieu-Daudé2021-01-141-0/+1
* target/mips: Simplify msa_reset()Philippe Mathieu-Daudé2021-01-141-4/+1Star
* target/mips: Introduce ase_msa_available() helperPhilippe Mathieu-Daudé2021-01-141-1/+1
* target/mips: Rename translate_init.c as cpu-defs.cPhilippe Mathieu-Daudé2021-01-141-1/+1
* target/mips: Move common helpers from helper.c to cpu.cPhilippe Mathieu-Daudé2021-01-141-6/+209
* target/mips: Inline cpu_state_reset() in mips_cpu_reset()Philippe Mathieu-Daudé2021-01-141-17/+9Star
* target/mips/mips-defs: Rename ISA_MIPS32R6 as ISA_MIPS_R6Philippe Mathieu-Daudé2021-01-141-3/+3
* tcg: Make tb arg to synchronize_from_tb constRichard Henderson2021-01-071-1/+2
* target/mips: Don't use clock_get_ns() in clock period calculationPeter Maydell2021-01-041-2/+2
* qapi: Use QAPI_LIST_PREPEND() where possibleEric Blake2020-12-191-5/+1Star
* target/mips: Inline cpu_mips_realize_env() in mips_cpu_realizefn()Philippe Mathieu-Daudé2020-12-131-12/+8Star
* target/mips: Move cpu definitions, reset() and realize() to cpu.cPhilippe Mathieu-Daudé2020-12-131-0/+243
* target/mips: Move mips_cpu_add_definition() from helper.c to cpu.cPhilippe Mathieu-Daudé2020-12-131-0/+33
* target/mips: Extract cpu_supports*/cpu_set* translate.cPhilippe Mathieu-Daudé2020-12-131-0/+18
* target/mips: Introduce ase_mt_available() helperPhilippe Mathieu-Daudé2020-12-131-1/+1
* target/mips: Introduce cpu_supports_isa() taking CPUMIPSState argumentPhilippe Mathieu-Daudé2020-12-131-0/+5
* target/mips/cpu: Display warning when CPU is used without input clockPhilippe Mathieu-Daudé2020-10-171-0/+10
* target/mips/cpu: Introduce mips_cpu_create_with_clock() helperPhilippe Mathieu-Daudé2020-10-171-0/+12
* target/mips/cpu: Allow the CPU to use dynamic frequenciesPhilippe Mathieu-Daudé2020-10-171-2/+9
* target/mips/cpu: Make cp0_count_rate a propertyPhilippe Mathieu-Daudé2020-10-171-8/+11
* target/mips/cpu: Calculate the CP0 timer period using the CPU frequencyPhilippe Mathieu-Daudé2020-10-171-2/+2
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