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path: root/target/mips/tcg/translate.c
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* accel/tcg: Add DisasContextBase argument to translator_ld*Ilya Leoshkevich2021-09-141-4/+4
* target/mips: Replace TARGET_WORDS_BIGENDIAN by cpu_is_bigendian()Philippe Mathieu-Daudé2021-08-251-35/+35
* target/mips: Store CP0_Config0 in DisasContextPhilippe Mathieu-Daudé2021-08-251-0/+1
* target/mips: Define gen_helper() macros in translate.hPhilippe Mathieu-Daudé2021-08-251-12/+0Star
* target/mips: Use tcg_constant_i32() in generate_exception_err()Philippe Mathieu-Daudé2021-08-251-5/+2Star
* target/mips: Inline gen_helper_0e0i()Philippe Mathieu-Daudé2021-08-251-6/+2Star
* target/mips: Inline gen_helper_1e1i() call in op_ld_INSN() macrosPhilippe Mathieu-Daudé2021-08-251-5/+1Star
* target/mips: Simplify gen_helper() macros by using tcg_constant_i32()Philippe Mathieu-Daudé2021-08-251-15/+5Star
* target/mips: Use tcg_constant_i32() in gen_helper_0e2i()Philippe Mathieu-Daudé2021-08-251-12/+2Star
* target/mips: Remove gen_helper_1e2i()Philippe Mathieu-Daudé2021-08-251-6/+0Star
* target/mips: Remove gen_helper_0e3i()Philippe Mathieu-Daudé2021-08-251-6/+0Star
* target/mips: Remove duplicated check_cp1_enabled() calls in Loongson EXTPhilippe Mathieu-Daudé2021-08-251-2/+0Star
* target/mips: Convert Vr54xx MSA* opcodes to decodetreePhilippe Mathieu-Daudé2021-08-251-53/+2Star
* target/mips: Convert Vr54xx MUL* opcodes to decodetreePhilippe Mathieu-Daudé2021-08-251-24/+0Star
* target/mips: Convert Vr54xx MACC* opcodes to decodetreePhilippe Mathieu-Daudé2021-08-251-16/+0Star
* target/mips: Introduce decodetree structure for NEC Vr54xx extensionPhilippe Mathieu-Daudé2021-08-251-0/+3
* target/mips: Decode vendor extensions before MIPS ISAsPhilippe Mathieu-Daudé2021-08-251-3/+5
* target/mips: Simplify PREF opcodePhilippe Mathieu-Daudé2021-08-251-6/+2Star
* target/mips: Remove JR opcode unused argumentsPhilippe Mathieu-Daudé2021-08-251-1/+1
* accel/tcg: Remove TranslatorOps.breakpoint_checkRichard Henderson2021-07-211-19/+0Star
* Merge remote-tracking branch 'remotes/philmd/tags/mips-20210711' into stagingPeter Maydell2021-07-121-14/+2Star
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| * target/mips/tx79: Introduce LQ opcode (Load Quadword)Philippe Mathieu-Daudé2021-07-111-14/+2Star
* | target/mips: Fix missing else in gen_goto_tbRichard Henderson2021-07-091-1/+2
* | target/mips: Use translator_use_goto_tbRichard Henderson2021-07-091-15/+2Star
* | tcg: Avoid including 'trace-tcg.h' in target translate.cPhilippe Mathieu-Daudé2021-07-091-1/+0Star
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* target/mips: Extract nanoMIPS ISA translation routinesPhilippe Mathieu-Daudé2021-07-021-4922/+2Star
* target/mips: Extract the microMIPS ISA translation routinesPhilippe Mathieu-Daudé2021-07-021-3225/+6Star
* target/mips: Extract Code Compaction ASE translation routinesPhilippe Mathieu-Daudé2021-07-021-1117/+6Star
* target/mips: Add declarations for generic TCG helpersPhilippe Mathieu-Daudé2021-07-021-5/+4Star
* target/mips: Optimize regnames[] arraysPhilippe Mathieu-Daudé2021-06-241-2/+2
* target/mips: fix emulation of nanoMIPS BPOSGE32 instructionAleksandar Rikalo2021-06-241-1/+1
* target/mips: Remove microMIPS BPOSGE32 / BPOSGE64 unuseful casesPhilippe Mathieu-Daudé2021-06-241-6/+0Star
* target/mips: Remove SmartMIPS / MDMX unuseful commentsPhilippe Mathieu-Daudé2021-06-241-8/+0Star
* target/mips: Move TCG trace events to tcg/ sub directoryPhilippe Mathieu-Daudé2021-06-241-1/+1
* target/mips: Do not abort on invalid instructionPhilippe Mathieu-Daudé2021-06-241-2/+2
* target/mips: Raise exception when DINSV opcode used with DSP disabledPhilippe Mathieu-Daudé2021-06-241-1/+2
* target/mips: Fix more TCG temporary leaks in gen_pool32a5_nanomips_insnPhilippe Mathieu-Daudé2021-06-241-0/+4
* target/mips: Fix TCG temporary leaks in gen_pool32a5_nanomips_insn()Philippe Mathieu-Daudé2021-06-241-0/+2
* target/mips: Fix 'Uncoditional' typoPhilippe Mathieu-Daudé2021-06-051-3/+3
* target/mips: Move TCG source files under tcg/ sub directoryPhilippe Mathieu-Daudé2021-05-021-0/+25682
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