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path: root/target/openrisc/cpu.h
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* target/openrisc: Support non-busy idle state using PMR SPRStafford Horne2017-05-041-0/+10
* target/openrisc: Remove duplicate features propertyStafford Horne2017-05-041-14/+2Star
* target/openrisc: implement shadow registersStafford Horne2017-05-041-2/+13
* target/openrisc: Implement EVBAR registerTim 'mithro' Ansell2017-04-211-0/+7
* target/openrisc: Optimize for r0 being zeroRichard Henderson2017-02-131-1/+4
* target/openrisc: Tidy handling of delayed branchesRichard Henderson2017-02-131-7/+5Star
* target/openrisc: Tidy ppc/npc implementationRichard Henderson2017-02-131-1/+1
* target/openrisc: Fix maddRichard Henderson2017-02-131-3/+0Star
* target/openrisc: Represent MACHI:MACLO as a single unitRichard Henderson2017-02-131-2/+1Star
* target/openrisc: Keep SR_CY and SR_OV in a separate variablesRichard Henderson2017-02-131-3/+10
* target/openrisc: Keep SR_F in a separate variableRichard Henderson2017-02-131-2/+13
* target/openrisc: Put SR[OVE] in TB flagsRichard Henderson2017-02-131-2/+2
* target/openrisc: Implement lwa, swaRichard Henderson2017-02-131-0/+3
* target/openrisc: Rename the cpu from or32 to or1kRichard Henderson2017-02-131-1/+1
* qom/cpu: move tlb_flush to cpu_common_resetAlex Bennée2017-01-131-0/+3
* Move target-* CPU file into a target/ folderThomas Huth2016-12-201-0/+411