Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | openrisc/cputimer: Perparation for Multicore | Stafford Horne | 2017-10-20 | 1 | -1/+0 |
* | target/openrisc: Support non-busy idle state using PMR SPR | Stafford Horne | 2017-05-04 | 1 | -0/+1 |
* | target/openrisc: Implement full vmstate serialization | Stafford Horne | 2017-05-04 | 1 | -2/+71 |
* | target/openrisc: implement shadow registers | Stafford Horne | 2017-05-04 | 1 | -3/+3 |
* | target/openrisc: Tidy ppc/npc implementation | Richard Henderson | 2017-02-13 | 1 | -3/+2 |
* | target/openrisc: Represent MACHI:MACLO as a single unit | Richard Henderson | 2017-02-13 | 1 | -2/+3 |
* | target/openrisc: Keep SR_F in a separate variable | Richard Henderson | 2017-02-13 | 1 | -1/+37 |
* | target/openrisc: Implement lwa, swa | Richard Henderson | 2017-02-13 | 1 | -8/+16 |
* | Move target-* CPU file into a target/ folder | Thomas Huth | 2016-12-20 | 1 | -0/+54 |