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path: root/target/ppc/cpu.h
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* target/ppc: Add new PMC HFLAGSLeandro Lupori2022-10-281-1/+3
* target/ppc: introduce ppc_maybe_interruptMatheus Ferst2022-10-281-0/+1
* target/ppc: remove ppc_store_lpcr from CONFIG_USER_ONLY buildsMatheus Ferst2022-10-281-1/+1
* target/ppc: define PPC_INTERRUPT_* values directlyMatheus Ferst2022-10-281-20/+20
* dump: Replace opaque DumpState pointer with a typed oneJanosch Frank2022-10-061-2/+2
* target/ppc: Remove unused xer_* macrosVíctor Colombo2022-09-201-4/+0Star
* target/ppc: Remove extra space from s128 field in ppc_vsr_tVíctor Colombo2022-09-201-1/+1
* target/ppc: Add HASHKEYR and HASHPKEYR SPRsVíctor Colombo2022-09-201-0/+2
* target/ppc: remove mfdcrux and mtdcruxMatheus Ferst2022-07-181-4/+2Star
* ppc: Remove unused irq_inputsCédric Le Goater2022-07-181-1/+0Star
* target/ppc: Add flag for ISA v2.06 BCDA instructionsMatheus Ferst2022-07-061-1/+4
* ppc: Define SETFIELD for the ppc targetAlexey Kardashevskiy2022-07-061-0/+12
* target/ppc: Change FPSCR_* to follow POWER ISA numbering conventionVíctor Colombo2022-07-061-36/+36
* target/ppc: Implemented xvf16ger*Lucas Mateus Castro (alqotel)2022-05-261-0/+3
* target/ppc: Implemented xvf*ger*Lucas Mateus Castro (alqotel)2022-05-261-0/+4
* target/ppc: Implemented xvi*ger* instructionsLucas Mateus Castro (alqotel)2022-05-261-0/+1
* target/ppc: Implement xxm[tf]acc and xxsetacczLucas Mateus Castro (alqotel)2022-05-261-0/+5
* target/ppc: Implement lwsync with weaker memory orderingNicholas Piggin2022-05-261-1/+3
* target/ppc: Fix FPSCR.FI bit being cleared when it shouldn'tVíctor Colombo2022-05-261-0/+2
* target/ppc: Change MSR_* to follow POWER ISA numbering conventionVíctor Colombo2022-05-051-43/+44
* target/ppc: Add unused msr bits FIELDsVíctor Colombo2022-05-051-0/+25
* target/ppc: Remove msr_de macroVíctor Colombo2022-05-051-2/+1Star
* target/ppc: Remove msr_hv macroVíctor Colombo2022-05-051-5/+6
* target/ppc: Remove msr_ts macroVíctor Colombo2022-05-051-1/+1
* target/ppc: Remove msr_fe0 and msr_fe1 macrosVíctor Colombo2022-05-051-2/+9
* target/ppc: Remove msr_ep macroVíctor Colombo2022-05-051-1/+1
* target/ppc: Remove msr_dr macroVíctor Colombo2022-05-051-1/+1
* target/ppc: Remove msr_ir macroVíctor Colombo2022-05-051-1/+1
* target/ppc: Remove msr_cm macroVíctor Colombo2022-05-051-1/+1
* target/ppc: Remove msr_fp macroVíctor Colombo2022-05-051-1/+1
* target/ppc: Remove msr_gs macroVíctor Colombo2022-05-051-1/+1
* target/ppc: Remove msr_me macroVíctor Colombo2022-05-051-1/+1
* target/ppc: Remove msr_pow macroVíctor Colombo2022-05-051-1/+1
* target/ppc: Remove msr_ce macroVíctor Colombo2022-05-051-1/+1
* target/ppc: Remove msr_ee macroVíctor Colombo2022-05-051-1/+1
* target/ppc: Remove msr_ile macroVíctor Colombo2022-05-051-2/+2
* target/ppc: Remove msr_ds macroVíctor Colombo2022-05-051-1/+1
* target/ppc: Remove msr_le macroVíctor Colombo2022-05-051-1/+1
* target/ppc: Remove msr_pr macroVíctor Colombo2022-05-051-1/+3
* target/ppc: Remove unused msr_* macrosVíctor Colombo2022-05-051-20/+0Star
* target/ppc: Remove fpscr_* macros from cpu.hVíctor Colombo2022-05-051-29/+0Star
* compiler.h: replace QEMU_NORETURN with G_NORETURNMarc-André Lureau2022-04-211-7/+7
* Move CPU softfloat unions to cpu-float.hMarc-André Lureau2022-04-061-0/+1
* Replace config-time define HOST_WORDS_BIGENDIANMarc-André Lureau2022-04-061-1/+1
* target: Use ArchCPU as interface to target CPUPhilippe Mathieu-Daudé2022-03-061-1/+1
* target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macroPhilippe Mathieu-Daudé2022-03-061-2/+0Star
* target: Use CPUArchState as interface to target-specific CPU statePhilippe Mathieu-Daudé2022-03-061-2/+1Star
* target/ppc: trigger PERFM EBBs from power8-pmu.cDaniel Henrique Barboza2022-03-021-0/+5
* target/ppc: add PPC_INTERRUPT_EBB and EBB exceptionsDaniel Henrique Barboza2022-03-021-1/+4
* target/ppc: cpu_init: Move check_pow and QOM macros to a headerFabiano Rosas2022-02-181-0/+39
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