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path: root/target/riscv/gdbstub.c
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* target/riscv: Generate the GDB XML file for CSR registers dynamicallyBin Meng2021-01-161-264/+44Star
* gdbstub: extend GByteArray to read register helpersAlex Bennée2020-03-171-10/+10
* target/riscv: Add the Hypervisor CSRs to CPUStateAlistair Francis2020-02-271-5/+6
* riscv: Separate FPU register size from core register size in gdbstub [v2]Keith Packard2020-02-101-9/+11
* target/riscv: Make the priv register writable by GDBJonathan Behrens2019-10-281-0/+9
* target/riscv: Expose "priv" register for GDB for readsJonathan Behrens2019-10-281-0/+23
* target/riscv: Tell gdbstub the correct number of CSRsJonathan Behrens2019-10-281-2/+2
* gdbstub: riscv: fix the fflags registersKONRAD Frederic2019-09-171-2/+4
* Include qemu-common.h exactly where neededMarkus Armbruster2019-06-121-1/+0Star
* RISC-V: Add hooks to use the gdb xml files.Jim Wilson2019-03-191-11/+339
* RISC-V: Implement modular CSR helper interfaceMichael Clark2019-01-081-2/+8
* RISC-V GDB StubMichael Clark2018-03-061-0/+62