summaryrefslogtreecommitdiffstats
path: root/target/riscv/helper.h
Commit message (Expand)AuthorAgeFilesLines
* target/riscv: rvb: generalized or-combineFrank Chang2021-06-081-0/+2
* target/riscv: rvb: generalized reverseFrank Chang2021-06-081-0/+4
* target/riscv: Consolidate RV32/64 32-bit instructionsAlistair Francis2021-05-111-10/+8Star
* target/riscv: fpu_helper: Match function defs in HELPER macrosAlistair Francis2020-12-181-16/+8Star
* target/riscv: Split the Hypervisor execute load helpersAlistair Francis2020-11-101-1/+2
* target/riscv: Remove the hyp load and store functionsAlistair Francis2020-11-101-2/+0Star
* target/riscv: Support the Virtual Instruction faultAlistair Francis2020-08-251-0/+1
* target/riscv: Allow generating hlv/hlvx/hsv instructionsAlistair Francis2020-08-251-0/+3
* target/riscv: vector compress instructionLIU Zhiwei2020-07-021-0/+5
* target/riscv: vector register gather instructionLIU Zhiwei2020-07-021-0/+9
* target/riscv: vector slide instructionsLIU Zhiwei2020-07-021-0/+17
* target/riscv: vector element index instructionLIU Zhiwei2020-07-021-0/+5
* target/riscv: vector iota instructionLIU Zhiwei2020-07-021-0/+5
* target/riscv: set-X-first mask bitLIU Zhiwei2020-07-021-0/+4
* target/riscv: vmfirst find-first-set mask bitLIU Zhiwei2020-07-021-0/+2
* target/riscv: vector mask population count vmpopcLIU Zhiwei2020-07-021-0/+2
* target/riscv: vector mask-register logical instructionsLIU Zhiwei2020-07-021-0/+9
* target/riscv: vector widening floating-point reduction instructionsLIU Zhiwei2020-07-021-0/+3
* target/riscv: vector single-width floating-point reduction instructionsLIU Zhiwei2020-07-021-0/+10
* target/riscv: vector wideing integer reduction instructionsLIU Zhiwei2020-07-021-0/+7
* target/riscv: vector single-width integer reduction instructionsLIU Zhiwei2020-07-021-0/+33
* target/riscv: narrowing floating-point/integer type-convert instructionsLIU Zhiwei2020-07-021-0/+11
* target/riscv: widening floating-point/integer type-convert instructionsLIU Zhiwei2020-07-021-0/+11
* target/riscv: vector floating-point/integer type-convert instructionsLIU Zhiwei2020-07-021-0/+13
* target/riscv: vector floating-point merge instructionsLIU Zhiwei2020-07-021-0/+4
* target/riscv: vector floating-point classify instructionsLIU Zhiwei2020-07-021-0/+4
* target/riscv: vector floating-point compare instructionsLIU Zhiwei2020-07-021-0/+37
* target/riscv: vector floating-point sign-injection instructionsLIU Zhiwei2020-07-021-0/+19
* target/riscv: vector floating-point min/max instructionsLIU Zhiwei2020-07-021-0/+13
* target/riscv: vector floating-point square-root instructionLIU Zhiwei2020-07-021-0/+4
* target/riscv: vector widening floating-point fused multiply-add instructionsLIU Zhiwei2020-07-021-0/+17
* target/riscv: vector single-width floating-point fused multiply-add instructionsLIU Zhiwei2020-07-021-0/+49
* target/riscv: vector widening floating-point multiplyLIU Zhiwei2020-07-021-0/+5
* target/riscv: vector single-width floating-point multiply/divide instructionsLIU Zhiwei2020-07-021-0/+16
* target/riscv: vector widening floating-point add/subtract instructionsLIU Zhiwei2020-07-021-0/+17
* target/riscv: vector single-width floating-point add/subtract instructionsLIU Zhiwei2020-07-021-0/+16
* target/riscv: vector narrowing fixed-point clip instructionsLIU Zhiwei2020-07-021-0/+13
* target/riscv: vector single-width scaling shift instructionsLIU Zhiwei2020-07-021-0/+17
* target/riscv: vector widening saturating scaled multiply-addLIU Zhiwei2020-07-021-0/+22
* target/riscv: vector single-width fractional multiply with rounding and satur...LIU Zhiwei2020-07-021-0/+9
* target/riscv: vector single-width averaging add and subtractLIU Zhiwei2020-07-021-0/+17
* target/riscv: vector single-width saturating add and subtractLIU Zhiwei2020-07-021-0/+33
* target/riscv: vector integer merge and move instructionsLIU Zhiwei2020-07-021-0/+17
* target/riscv: vector widening integer multiply-add instructionsLIU Zhiwei2020-07-021-0/+22
* target/riscv: vector single-width integer multiply-add instructionsLIU Zhiwei2020-07-021-0/+33
* target/riscv: vector widening integer multiply instructionsLIU Zhiwei2020-07-021-0/+19
* target/riscv: vector integer divide instructionsLIU Zhiwei2020-07-021-0/+33
* target/riscv: vector single-width integer multiply instructionsLIU Zhiwei2020-07-021-0/+33
* target/riscv: vector integer min/max instructionsLIU Zhiwei2020-07-021-0/+33
* target/riscv: vector integer comparison instructionsLIU Zhiwei2020-07-021-0/+57
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-12-12 02:53:57 +0100