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* target/tricore: Implement gdbstubBastian Koppelmann2020-06-014-1/+152
* target/tricore: Implement tricore_cpu_get_phys_page_debugBastian Koppelmann2020-06-012-9/+14
* target/tricore: Raise EXCP_DEBUG in gen_goto_tb() for singlestepBastian Koppelmann2020-06-011-9/+9
* target/tricore: Move translate feature check to ctxBastian Koppelmann2020-06-011-27/+33
* target/tricore: Don't save pc in generate_qemu_excpBastian Koppelmann2020-06-011-1/+0Star
* cpu: Use DeviceClass reset instead of a special CPUClass resetPeter Maydell2020-03-182-4/+5
* cpu: Use cpu_class_set_parent_reset()Greg Kurz2020-01-241-2/+1Star
* tcg: Search includes from the project root source directoryPhilippe Mathieu-Daudé2020-01-161-1/+1
* tcg: TCGMemOp is now accelerator independent MemOpTony Nguyen2019-09-031-4/+4
* Merge remote-tracking branch 'remotes/bkoppelmann2/tags/pull-tricore-20190822...Peter Maydell2019-08-223-261/+324
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| * target/tricore: Fix tricore_tr_translate_insnBastian Koppelmann2019-08-221-13/+34
| * target/tricore: Implement a qemu excptions helperBastian Koppelmann2019-08-223-1/+27
| * target/tricore: Use translate_loopBastian Koppelmann2019-08-221-44/+74
| * target-tricore: Make env a member of DisasContextBastian Koppelmann2019-08-221-172/+168Star
| * target/tricore: Use DisasContextBase APIBastian Koppelmann2019-08-221-54/+44Star
* | hw/core: Move cpu.c, cpu.h from qom/ to hw/core/Markus Armbruster2019-08-211-1/+1
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* targets (various): use softfloat-helpers.h where we canAlex Bennée2019-08-191-1/+1
* tricore: add QSEED instructionAndreas Konopik2019-06-253-0/+89
* tricore: sync ctx.hflags with tb->flagsGeorg Hofstetter2019-06-251-0/+1
* tricore: fix RRPW_INSERT instructionDavid Brenken2019-06-251-2/+2
* tricore: add UTOF instructionDavid Brenken2019-06-253-0/+20
* tricore: add FTOIZ instructionDavid Brenken2019-06-253-0/+29
* Supply missing header guardsMarkus Armbruster2019-06-121-0/+5
* Include qemu-common.h exactly where neededMarkus Armbruster2019-06-122-2/+0Star
* cpu: Remove CPU_COMMONRichard Henderson2019-06-101-2/+0Star
* cpu: Introduce CPUNegativeOffsetStateRichard Henderson2019-06-101-0/+1
* cpu: Introduce cpu_set_cpustate_pointersRichard Henderson2019-06-101-3/+1Star
* cpu: Move ENV_OFFSET to exec/gen-icount.hRichard Henderson2019-06-101-1/+0Star
* target/tricore: Use env_cpuRichard Henderson2019-06-102-6/+1Star
* cpu: Replace ENV_GET_CPU with env_cpuRichard Henderson2019-06-101-2/+0Star
* cpu: Define ArchCPURichard Henderson2019-06-101-0/+1
* cpu: Define CPUArchState with typedefRichard Henderson2019-06-101-5/+1Star
* tcg: Split out target/arch/cpu-param.hRichard Henderson2019-06-103-8/+18
* Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190510' into stagingPeter Maydell2019-05-164-38/+18Star
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| * tcg: Use CPUClass::tlb_fill in cputlb.cRichard Henderson2019-05-101-6/+0Star
| * target/tricore: Convert to CPUClass::tlb_fillRichard Henderson2019-05-104-37/+23Star
* | target/tricore: Use tcg_gen_abs_tlPhilippe Mathieu-Daudé2019-05-141-22/+5Star
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* tcg: Hoist max_insns computation to tb_gen_codeRichard Henderson2019-04-241-14/+2Star
* qom/cpu: Simplify how CPUClass:cpu_dump_state() printsMarkus Armbruster2019-04-182-15/+14Star
* target: Simplify how the TARGET_cpu_list() printMarkus Armbruster2019-04-182-11/+6Star
* tricore: fixed RCR_CADDN instructionDavid Brenken2019-03-081-2/+2
* tricore: fixed RCR_CADD instructionDavid Brenken2019-03-081-2/+2
* target/tricore: Fix LGPL version numberThomas Huth2019-01-3010-10/+10
* target/tricore: use float32_is_denormalEmilio G. Cota2018-12-171-7/+2Star
* tcg: Pass tb and index to tcg_gen_exit_tb separatelyRichard Henderson2018-06-021-10/+10
* icount: fix cpu_restore_state_from_tb for non-tb-exit casesPavel Dovgalyuk2018-04-111-1/+1
* cpu: get rid of unused cpu_init() definesIgor Mammedov2018-03-191-2/+0Star
* cpu: add CPU_RESOLVING_TYPE macroIgor Mammedov2018-03-191-0/+1
* qom: introduce object_class_get_list_sortedPaolo Bonzini2018-03-121-1/+1
* tricore: renamed masking of PIEDavid Brenken2018-03-022-9/+10
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