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* target-s390x: Use clz opcodeRichard Henderson2017-01-103-8/+1Star
* target-ppc: Use clz and ctz opcodesRichard Henderson2017-01-103-28/+16Star
* target-openrisc: Use clz and ctz opcodesRichard Henderson2017-01-103-23/+4Star
* target-mips: Use clz opcodeRichard Henderson2017-01-103-36/+16Star
* target-microblaze: Use clz opcodeRichard Henderson2017-01-103-7/+1Star
* target-cris: Use clz opcodeRichard Henderson2017-01-103-7/+1Star
* target-alpha: Use the ctz and clz opcodesRichard Henderson2017-01-103-14/+2Star
* target-s390x: Use the new deposit and extract opsRichard Henderson2017-01-101-12/+22
* target-ppc: Use the new deposit and extract opsRichard Henderson2017-01-101-16/+19
* target-mips: Use the new extract opRichard Henderson2017-01-101-7/+5Star
* target-i386: Use new deposit and extract opsRichard Henderson2017-01-101-22/+23
* target-arm: Use new deposit and extract opsRichard Henderson2017-01-102-81/+37Star
* target-alpha: Use deposit and extract opsRichard Henderson2017-01-101-25/+42
* Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-2.9-pull-request' ...Peter Maydell2016-12-286-265/+1616
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| * target-m68k: free TCG variables that are notLaurent Vivier2016-12-271-9/+32
| * target-m68k: add rol/ror/roxl/roxr instructionsLaurent Vivier2016-12-271-0/+391
| * target-m68k: Inline shiftsRichard Henderson2016-12-273-80/+201
| * target-m68k: Do not cpu_abort on undefined insnsRichard Henderson2016-12-271-3/+5
| * target-m68k: Implement 680x0 movemLaurent Vivier2016-12-271-23/+107
| * target-m68k: add cas/cas2 opsLaurent Vivier2016-12-273-0/+265
| * target-m68k: add abcd/sbcd/nbcdLaurent Vivier2016-12-271-0/+220
| * target-m68k: add 680x0 divu/divs variantsLaurent Vivier2016-12-275-70/+211
| * target-m68k: add 64bit mullLaurent Vivier2016-12-271-12/+50
| * target-m68k: add cmpmLaurent Vivier2016-12-271-0/+16
| * target-m68k: Split gen_lea and gen_eaRichard Henderson2016-12-271-53/+59
| * target-m68k: Delay autoinc writebackRichard Henderson2016-12-271-20/+64
* | target-arm: Add VBAR support to ARM1176 CPUsCédric Le Goater2016-12-273-6/+23
* | target-arm: Log AArch64 exception returnsPeter Maydell2016-12-271-0/+9
* | target-arm: Fix aarch64 disas_ldst_single_structRichard Henderson2016-12-271-2/+2
* | target-arm: Fix aarch64 vec_reg_offsetRichard Henderson2016-12-271-1/+2
* | Correct value of ARM Cortex-A8 MVFR1 register.Julian Brown2016-12-271-1/+1
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* x86: implement la57 paging modeKirill A. Shutemov2016-12-225-74/+274
* target-i386: Fix eflags.TF/#DB handling of syscall/sysret insnsDoug Evans2016-12-223-5/+32
* kvmclock: reduce kvmclock difference on migrationMarcelo Tosatti2016-12-222-0/+8
* x86: Fix x86_64 'g' packet response to gdb from 32-bit mode.Doug Evans2016-12-221-13/+39
* target-i386: Add Intel SHA_NI instruction support.Yi Sun2016-12-222-1/+2
* Move target-* CPU file into a target/ folderThomas Huth2016-12-20339-0/+270836