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* | | ppc/translate: Rewrite gen_lxvdsx to use gvec primitivesGiuseppe Musacchio2020-12-141-23/+23
* | | ppc/translate: Raise exceptions after setting the ccGiuseppe Musacchio2020-12-141-14/+14
* | | ppc/translate: Delay NaN checking after comparisonGiuseppe Musacchio2020-12-141-38/+42
* | | ppc/translate: Turn the helper macros into functionsGiuseppe Musacchio2020-12-141-105/+123
* | | ppc/translate: Fix unordered f64/f128 comparisonsGiuseppe Musacchio2020-12-141-10/+22
* | | target/ppc: replaced the TODO with LOG_UNIMP and add break for silence warningsChen Qun2020-12-141-2/+3
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* | m68k: fix some comment spelling errorszhaolichang2020-12-121-8/+8
* | target/m68k: Add vmstate definition for M68kCPULaurent Vivier2020-12-123-6/+198
* | target/m68k: remove useless qregs arrayLaurent Vivier2020-12-121-4/+0Star
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* Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20201211' into stagingPeter Maydell2020-12-111-0/+5
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| * s390x/cpu: Use timer_free() in the finalize function to avoid memleaksGan Qixin2020-12-111-0/+5
* | Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...Peter Maydell2020-12-1114-68/+632
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| * | s390x: do not use ram_size globalPaolo Bonzini2020-12-103-5/+12
| * | m68k: do not use ram_size globalPaolo Bonzini2020-12-101-2/+3
| * | arm: do not use ram_size globalPaolo Bonzini2020-12-101-1/+2
| * | WHPX: support for the kernel-irqchip on/offSunil Muthuswamy2020-12-105-35/+543
| * | target/i386: seg_helper: Correct segment selector nullification in the RET/IR...Bin Meng2020-12-101-1/+4
| * | target/i386: Support up to 32768 CPUs without IRQ remappingDavid Woodhouse2020-12-103-20/+64
| * | target/i386: fix operand order for PDEP and PEXTPaolo Bonzini2020-12-101-4/+4
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* | i386/cpu: Make the Intel PT LIP feature configurableLuwei Kang2020-12-102-1/+34
* | sev: add sev-inject-launch-secretTobin Feldman-Fitzthum2020-12-104-0/+78
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* target/arm: Implement M-profile "minimal RAS implementation"Peter Maydell2020-12-102-0/+18
* target/arm: Implement CCR_S.TRD behaviour for SG insnsPeter Maydell2020-12-101-0/+86
* hw/intc/armv7m_nvic: Support v8.1M CCR.TRD bitPeter Maydell2020-12-101-0/+2
* target/arm: Implement new v8.1M VLLDM and VLSTM encodingsPeter Maydell2020-12-102-1/+26
* target/arm: Implement new v8.1M NOCP check for exception returnPeter Maydell2020-12-101-1/+21
* target/arm: In v8.1M, don't set HFSR.FORCED on vector table fetch failuresPeter Maydell2020-12-101-1/+5
* target/arm: For v8.1M, always clear R0-R3, R12, APSR, EPSR on exception entryPeter Maydell2020-12-101-4/+12
* hw/intc/armv7m_nvic: Update FPDSCR masking for v8.1MPeter Maydell2020-12-102-0/+8
* target/arm: Implement FPCXT_S fp system registerPeter Maydell2020-12-101-0/+58
* target/arm: Factor out preserve-fp-state from full_vfp_access_check()Peter Maydell2020-12-101-18/+27
* target/arm: Use new FPCR_NZCV_MASK constantPeter Maydell2020-12-101-2/+2
* target/arm: Implement M-profile FPSCR_nzcvqcPeter Maydell2020-12-102-0/+40
* target/arm: Implement VLDR/VSTR system registerPeter Maydell2020-12-102-0/+105
* target/arm: Move general-use constant expanders up in translate.cPeter Maydell2020-12-101-21/+25
* target/arm: Refactor M-profile VMSR/VMRS handlingPeter Maydell2020-12-102-11/+168
* target/arm: Enforce M-profile VMRS/VMSR register restrictionsPeter Maydell2020-12-101-1/+4
* target/arm: Implement CLRM instructionPeter Maydell2020-12-102-1/+43
* target/arm: Implement VSCCLRM insnPeter Maydell2020-12-104-11/+111
* target/arm: Don't clobber ID_PFR1.Security on M-profile coresPeter Maydell2020-12-101-1/+1
* target/arm: Implement v8.1M PXN extensionPeter Maydell2020-12-101-1/+6
* ppc/translate: Implement lxvwsx opcodeLemonBoy2020-11-242-0/+31
* target/arm: Make SYS_HEAPINFO work with RAM that doesn't start at 0Peter Maydell2020-11-231-4/+8
* target/arm: fix stage 2 page-walks in 32-bit emulationRémi Denis-Courmont2020-11-231-2/+2
* s390/kvm: fix diag318 propagation and reset functionalityCollin Walling2020-11-185-5/+30
* hvf: Fix segment selector formatJessica Clarke2020-11-181-4/+4
* hvf: Gate RDTSCP on CPU_BASED2_RDTSCP, not just CPU_BASED_TSC_OFFSETJessica Clarke2020-11-181-0/+4
* Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201117'...Peter Maydell2020-11-171-3/+0Star
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| * target/openrisc: Remove dead code attempting to check "is timer disabled"Peter Maydell2020-11-171-3/+0Star
* | Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-11-1...Peter Maydell2020-11-171-1/+2
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