summaryrefslogtreecommitdiffstats
path: root/target
Commit message (Expand)AuthorAgeFilesLines
* target/riscv: Pass the same value to oprsz and maxsz.LIU Zhiwei2021-06-081-39/+50
* target/riscv/pmp: Add assert for ePMP operationsAlistair Francis2021-06-081-0/+4
* target/riscv: Dump CSR mscratch/sscratch/satpChangbin Du2021-06-081-2/+5
* target/riscv: Remove unnecessary riscv_*_names[] declarationBin Meng2021-06-082-4/+2Star
* target/riscv: Do not include 'pmp.h' in user emulationPhilippe Mathieu-Daudé2021-06-081-0/+2
* target/riscv: fix wfi exception behaviorJose Martins2021-06-082-3/+9
* i386: run accel_cpu_instance_init as post_initClaudio Fontana2021-06-041-3/+7
* i386: reorder call to cpu_exec_realizefnClaudio Fontana2021-06-042-30/+61
* target/i386: Fix decode of cr8Richard Henderson2021-06-041-0/+1
* target/i386: tcg: fix switching from 16-bit to 32-bit tasks or vice versaPaolo Bonzini2021-06-041-1/+1
* target/i386: tcg: fix loading of registers from 16-bit TSSPaolo Bonzini2021-06-041-14/+11Star
* target/i386: tcg: fix segment register offsets for 16-bit TSSPaolo Bonzini2021-06-041-2/+2
* softfloat: Introduce Floatx80RoundPrecRichard Henderson2021-06-033-93/+126
* hvf: Simplify post reset/init/loadvm hooksAlexander Graf2021-06-031-1/+4
* hvf: Introduce hvf vcpu structAlexander Graf2021-06-038-234/+236
* hvf: Remove hvf-accel-ops.hAlexander Graf2021-06-031-2/+0Star
* hvf: Use cpu_synchronize_state()Alexander Graf2021-06-031-5/+4Star
* hvf: Split out common code on vcpu init and destroyAlexander Graf2021-06-031-21/+2Star
* hvf: Move hvf internal definitions into common headerAlexander Graf2021-06-031-30/+1Star
* hvf: Move cpu functions into common directoryAlexander Graf2021-06-033-306/+0Star
* hvf: Move vcpu thread functions into common directoryAlexander Graf2021-06-034-171/+1Star
* hvf: Move assert_hvf_ok() into common directoryAlexander Graf2021-06-031-32/+1Star
* target/arm: Enable BFloat16 extensionsRichard Henderson2021-06-033-0/+7
* target/arm: Implement bfloat widening fma (indexed)Richard Henderson2021-06-037-1/+82
* target/arm: Implement bfloat widening fma (vector)Richard Henderson2021-06-037-4/+73
* target/arm: Implement bfloat16 matrix multiply accumulateRichard Henderson2021-06-037-3/+81
* target/arm: Implement bfloat16 dot product (indexed)Richard Henderson2021-06-037-9/+80
* target/arm: Implement bfloat16 dot product (vector)Richard Henderson2021-06-037-0/+89
* target/arm: Implement vector float32 to bfloat16 conversionRichard Henderson2021-06-039-0/+95
* target/arm: Implement scalar float32 to bfloat16 conversionRichard Henderson2021-06-035-0/+51
* target/arm: Unify unallocated path in disas_fp_1srcRichard Henderson2021-06-031-9/+6Star
* target/arm: Add isar_feature_{aa32, aa64, aa64_sve}_bf16Richard Henderson2021-06-031-0/+15
* target/arm: use raise_exception_ra for stack limit exceptionJamie Iles2021-06-032-10/+4Star
* target/arm: use raise_exception_ra for MTE check failureJamie Iles2021-06-031-9/+3Star
* target/arm: fold do_raise_exception into raise_exceptionJamie Iles2021-06-031-10/+2Star
* target/arm: fix missing exception classJamie Iles2021-06-031-2/+9
* target/arm: Mark LDS{MIN,MAX} as signed operationsRichard Henderson2021-06-031-3/+10
* target/arm: Allow board models to specify initial NS VTORPeter Maydell2021-06-032-0/+12
* target/arm: Make FPSCR.LTPSIZE writable for MVEPeter Maydell2021-06-033-4/+9
* target/arm: Implement M-profile VPR registerPeter Maydell2021-06-033-0/+63
* target/arm: Fix return values in fp_sysreg_checks()Peter Maydell2021-06-031-3/+3
* target/arm: Add MVE check to VMOV_reg_sp and VMOV_reg_dpPeter Maydell2021-06-031-2/+13
* target/arm: Move fpsp/fpdp isar check into callers of do_vfp_2op_sp/dpPeter Maydell2021-06-031-18/+19
* target/arm: Update feature checks for insns which are "MVE or FP"Peter Maydell2021-06-031-19/+29
* target/arm: Add isar feature check functions for MVEPeter Maydell2021-06-031-0/+22
* target/ppc: fix single-step exception regressionLuis Pires2021-06-031-3/+2Star
* target/ppc: Move cmp/cmpi/cmpl/cmpli to decodetreeMatheus Ferst2021-06-033-52/+45Star
* target/ppc: Move addpcis to decodetreeMatheus Ferst2021-06-033-9/+13
* target/ppc: Implement vcfuged instructionMatheus Ferst2021-06-033-0/+64
* target/ppc: Implement cfuged instructionMatheus Ferst2021-06-034-0/+79
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-12-12 09:26:45 +0100