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* tcg/aarch64: Remove unused code in tcg_out_opQi Hu2022-10-251-17/+14Star
* tcg/loongarch64: Add direct jump supportQi Hu2022-10-252-7/+50
* tcg/ppc: Optimize 26-bit jumpsLeandro Lupori2022-10-041-31/+88
* accel/tcg: Introduce tb_pc and log_pcRichard Henderson2022-10-041-4/+4
* misc: fix commonly doubled up wordsDaniel P. Berrangé2022-08-011-1/+1
* tcg: Fix returned type in alloc_code_gen_buffer_splitwx_memfd()Shaobo Song2022-07-121-1/+1
* tcg/tci: Remove CONFIG_DEBUG_TCG_INTERPRETERRichard Henderson2022-07-052-12/+0Star
* tcg/ppc: implement rem[u]_i{32,64} with mod[su][wd]Matheus Kowalczuk Ferst2022-06-202-2/+24
* tcg/aarch64: Fix illegal insn from out-of-range shliRichard Henderson2022-06-021-1/+1
* tcg/i386: Fix encoding of OPC_VPSRAQ for INDEX_op_sars_vecRichard Henderson2022-06-021-1/+1
* tcg/ppc: Optimize memory ordering generation with lwsyncNicholas Piggin2022-05-261-3/+6
* tcg/ppc: ST_ST memory ordering is not provided with eieioNicholas Piggin2022-05-261-2/+0Star
* target/ppc: declare vmsumuh[ms] helper with call flagsMatheus Ferst2022-05-261-0/+1
* Normalize header guard symbol definitionMarkus Armbruster2022-05-111-1/+1
* tcg: Implement tcg_gen_{h,w}swap_{i32,i64}Richard Henderson2022-05-041-0/+30
* compiler.h: replace QEMU_NORETURN with G_NORETURNMarc-André Lureau2022-04-211-1/+2
* Merge tag 'pull-tcg-20220420' of https://gitlab.com/rth7680/qemu into stagingRichard Henderson2022-04-211-7/+27
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| * tcg: Fix indirect lowering vs TCG_OPF_COND_BRANCHRichard Henderson2022-04-201-7/+27
* | util/log: Remove qemu_log_flushRichard Henderson2022-04-201-1/+0Star
* | tcg: Pass the locked filepointer to tcg_dump_opsRichard Henderson2022-04-201-57/+52Star
* | *: Use fprintf between qemu_log_trylock/unlockRichard Henderson2022-04-201-34/+44
* | util/log: Rename qemu_log_lock to qemu_log_trylockRichard Henderson2022-04-201-4/+4
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* Remove qemu-common.h include from most unitsMarc-André Lureau2022-04-061-1/+0Star
* Replace qemu_real_host_page variables with inlined functionsMarc-André Lureau2022-04-061-4/+4
* Replace config-time define HOST_WORDS_BIGENDIANMarc-André Lureau2022-04-067-20/+20
* tcg/aarch64: Use 'ull' suffix to force 64-bit constantRichard Henderson2022-03-311-2/+2
* tcg/arm: Don't emit UNPREDICTABLE LDRD with Rm == Rt or Rt+1Richard Henderson2022-03-141-2/+15
* tcg/s390x: Fix tcg_out_dup_vec vs general registersRichard Henderson2022-03-141-0/+1
* tcg/s390x: Fix INDEX_op_bitsel_vec vs VSELRichard Henderson2022-03-141-1/+1
* tcg/s390x: Fix tcg_out_dupi_vec vs VGMRichard Henderson2022-03-141-2/+2
* osdep: Move memalign-related functions to their own headerPeter Maydell2022-03-071-0/+1
* tcg/i386: Implement bitsel for avx512Richard Henderson2022-03-042-2/+20
* tcg/i386: Implement more logical operations for avx512Richard Henderson2022-03-042-5/+39
* tcg/i386: Implement avx512 multiplyRichard Henderson2022-03-041-6/+6
* tcg/i386: Implement avx512 min/max/absRichard Henderson2022-03-041-7/+11
* tcg/i386: Expand scalar rotate with avx512 insnsRichard Henderson2022-03-041-20/+29
* tcg/i386: Remove rotls_vec from tcg_target_op_defRichard Henderson2022-03-041-1/+0Star
* tcg/i386: Expand vector word rotate as avx512vbmi2 shift-doubleRichard Henderson2022-03-041-1/+17
* tcg/i386: Support avx512vbmi2 vector shift-double instructionsRichard Henderson2022-03-043-0/+42
* tcg/i386: Implement avx512 variable rotateRichard Henderson2022-03-042-2/+25
* tcg/i386: Implement avx512 immediate rotateRichard Henderson2022-03-042-3/+14
* tcg/i386: Implement avx512 immediate sari shiftRichard Henderson2022-03-041-9/+21
* tcg/i386: Implement avx512 scalar shiftRichard Henderson2022-03-041-2/+10
* tcg/i386: Implement avx512 variable shiftsRichard Henderson2022-03-041-8/+24
* tcg/i386: Use tcg_can_emit_vec_op in expand_vec_cmp_noinvRichard Henderson2022-03-041-4/+4
* tcg/i386: Add tcg_out_evex_opcRichard Henderson2022-03-041-1/+50
* tcg/i386: Detect AVX512Richard Henderson2022-03-042-2/+26
* tcg/s390x: Implement vector NAND, NOR, EQVRichard Henderson2022-03-042-3/+20
* tcg/ppc: Implement vector NAND, NOR, EQVRichard Henderson2022-03-042-3/+18
* tcg: Add opcodes for vector nand, nor, eqvRichard Henderson2022-03-048-15/+45