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* target/ppc: Fix bcdsub. emulation when result overflowsFabiano Rosas2021-03-094-0/+161
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit d03b174a83 (target/ppc: simplify bcdadd/sub functions) meant to simplify some of the code but it inadvertently altered the way the CR6 field is set after the operation has overflowed. The CR6 bits are set based on the *unbounded* result of the operation, so we need to look at the result before returning from bcd_add_mag, otherwise we will look at 0 when it overflows. Consider the following subtraction: v0 = 0x9999999999999999999999999999999c (maximum positive BCD value) v1 = 0x0000000000000000000000000000001d (negative one BCD value) bcdsub. v0,v0,v1,0 The Power ISA 2.07B says: If the unbounded result is greater than zero, do the following. If PS=0, the sign code of the result is set to 0b1100. If PS=1, the sign code of the result is set to 0b1111. If the operation overflows, CR field 6 is set to 0b0101. Otherwise, CR field 6 is set to 0b0100. POWER9 hardware: vr0 = 0x0000000000000000000000000000000c (positive zero BCD value) cr6 = 0b0101 (0x5) (positive, overflow) QEMU: vr0 = 0x0000000000000000000000000000000c (positive zero BCD value) cr6 = 0b0011 (0x3) (zero, overflow) <--- wrong This patch reverts the part of d03b174a83 that introduced the problem and adds a test-case to avoid further regressions: before: $ make run-tcg-tests-ppc64le-linux-user (...) TEST bcdsub on ppc64le bcdsub: qemu/tests/tcg/ppc64le/bcdsub.c:58: test_bcdsub_gt: Assertion `(cr >> 4) == ((1 << 2) | (1 << 0))' failed. Fixes: d03b174a83 (target/ppc: simplify bcdadd/sub functions) Reported-by: Paul Clarke <pc@us.ibm.com> Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> Message-Id: <20210222194035.2723056-1-farosas@linux.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* meson.build: expose TCG cross compiler information in summaryAlex Bennée2021-02-241-8/+0Star
| | | | | | | | | | | | Blink and you miss the cross TCG compiler stuff so lets display it with the rest of the compiler information. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210222101455.12640-2-alex.bennee@linaro.org>
* Hexagon (tests/tcg/hexagon) TCG tests - floating pointTaylor Simpson2021-02-182-0/+371
| | | | | | | Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1612763186-18161-34-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* Hexagon (tests/tcg/hexagon) TCG tests - atomics/load/store/miscTaylor Simpson2021-02-187-0/+1147
| | | | | | Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <1612763186-18161-33-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* Hexagon (tests/tcg/hexagon) TCG tests - multiarchTaylor Simpson2021-02-184-1/+1549
| | | | | | | | | | | | Enable multiarch tests for Hexagon Modify tests/tcg/configure.sh Add reference files to tests/tcg/hexagon Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <1612763186-18161-32-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tests/plugin: expand insn test to detect duplicate instructionsAlex Bennée2021-02-183-0/+27
| | | | | | | | | | | | | | | | | | A duplicate insn is one that is appears to be executed twice in a row. This is currently possible due to -icount and cpu_io_recompile() causing a re-translation of a block. On it's own this won't trigger any tests though. The heuristics that the plugin use can't deal with the x86 rep instruction which (validly) will look like executing the same instruction several times. To avoid problems later we tweak the rules for x86 to run the "inline" version of the plugin. This also has the advantage of increasing coverage of the plugin code (see bugfix in previous commit). Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210213130325.14781-15-alex.bennee@linaro.org>
* tests/tcg/aarch64: Add mte smoke testsRichard Henderson2021-02-167-0/+239
| | | | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-32-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* target/arm: Use the proper TBI settings for linux-userRichard Henderson2021-02-161-1/+0Star
| | | | | | | | | | | | | | We were fudging TBI1 enabled to speed up the generated code. Now that we've improved the code generation, remove this. Also, tidy the comment to reflect the current code. The pauth test was testing a kernel address (-1) and making incorrect assumptions about TBI1; stick to userland addresses. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-23-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* tests/tcg: fix silent skipping of softmmu gdb testsAlex Bennée2021-02-151-1/+5
| | | | | Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210211122750.22645-16-alex.bennee@linaro.org>
* tests/tcg: Replace /bin/true by true (required on macOS)Stefan Weil2021-02-081-2/+2
| | | | | | | | | | | /bin/true is missing on macOS, but simply "true" is available as a shell builtin. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210128135627.2067003-1-sw@weilnetz.de> Message-Id: <20210202134001.25738-12-alex.bennee@linaro.org>
* tests/tcg: don't silently skip the gdb testsAlex Bennée2021-02-081-1/+4
| | | | | | | Otherwise people won't know what they are missing. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210202134001.25738-10-alex.bennee@linaro.org>
* tests/tcg/s390x: Fix EXRL testsDavid Hildenbrand2021-01-212-8/+8
| | | | | | | | | | | | | | | | The current EXRL tests crash on real machines: we must not use r0 as a base register for trt/trtr, otherwise the content gets ignored. Also, we must not use r0 for exrl, otherwise it gets ignored. Let's use the "a" constraint so we get a general purpose register != r0. For op2, we can simply specify a memory operand directly via "Q" (Memory reference without index register and with short displacement). Fixes: ad8c851d2e77 ("target/s390x: add EX support for TRT and TRTR") Signed-off-by: David Hildenbrand <david@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210111163845.18148-5-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
* tests: Rename PAGE_SIZE definitionsJiaxun Yang2021-01-201-3/+3
| | | | | | | | | | | | | | | | | As per POSIX specification of limits.h [1], OS libc may define PAGE_SIZE in limits.h. Self defined PAGE_SIZE is frequently used in tests, to prevent collosion of definition, we give PAGE_SIZE definitons reasonable prefixs. [1]: https://pubs.opengroup.org/onlinepubs/7908799/xsh/limits.h.html Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210118063808.12471-7-jiaxun.yang@flygoat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* target/arm: use official org.gnu.gdb.aarch64.sve layout for registersAlex Bennée2021-01-181-0/+11
| | | | | | | | | | | | | | | | | | While GDB can work with any XML description given to it there is special handling for SVE registers on the GDB side which makes the users life a little better. The changes aren't that major and all the registers save the $vg reported the same. All that changes is: - report org.gnu.gdb.aarch64.sve - use gdb nomenclature for names and types - minor re-ordering of the types to match reference - re-enable ieee_half (as we know gdb supports it now) - $vg is now a 64 bit int - check $vN and $zN aliasing in test Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Luis Machado <luis.machado@linaro.org> Message-Id: <20210108224256.2321-11-alex.bennee@linaro.org>
* gdbstub: add support to Xfer:auxv:read: packetLirong Yuan2021-01-182-0/+66
| | | | | | | | | | | | | This allows gdb to access the target’s auxiliary vector, which can be helpful for telling system libraries important details about the hardware, operating system, and process. Signed-off-by: Lirong Yuan <yuanzi@google.com> [AJB: minor tweaks to test case, update MAINTAINERS, restrict to Linux] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200730193932.3654677-1-yuanzi@google.com> Message-Id: <20210108224256.2321-7-alex.bennee@linaro.org>
* gdbstub: implement a softmmu based testAlex Bennée2021-01-188-3/+154
| | | | | | | | | | | | | | | | | This adds a new tests that allows us to test softmmu only features including watchpoints. To do achieve this we need to: - add _exit: labels to the boot codes - write a memory.py test case - plumb the test case into the build system - tweak the run_test script to: - re-direct output when asked - use socket based connection for all tests - add a small pause before connection Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210108224256.2321-6-alex.bennee@linaro.org>
* Revert "tests/tcg/multiarch/Makefile.target: Disable run-gdbstub-sha1 test"Alex Bennée2021-01-181-3/+1Star
| | | | | | | | | | We won't attempt to run the test now it's gated on a newer version of gdb. This reverts commit a930cadd83b4681a98ce72abf530a791ee2e42a6. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210108224256.2321-5-alex.bennee@linaro.org>
* tests/tcg: build tests with -WerrorAlex Bennée2021-01-021-1/+1
| | | | | | | | | | Hopefully this will guard against sloppy code getting into our tests. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201210190417.31673-9-alex.bennee@linaro.org>
* tests: remove GCC < 4 fallbacksMarc-André Lureau2020-12-151-5/+3Star
| | | | | | | | | | | | | Since commit efc6c07 ("configure: Add a test for the minimum compiler version"), QEMU explicitely depends on GCC >= 4.8. (clang >= 3.4 advertizes itself as GCC >= 4.2 compatible) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20201210134752.780923-6-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* tests/tcg/multiarch/Makefile.target: Disable run-gdbstub-sha1 testPeter Maydell2020-12-141-1/+3
| | | | | | | | | | | | | | | | | | | | | | Disable the run-gdbstub-sha1 test: it provokes an internal error assertion failure in Ubuntu gdb 8.1.1-0ubuntu1 (Ubuntu gdb 8.1-0ubuntu3.2 also has this assert but we were previously skipping this test because it doesn't support connection over local domain sockets) : timeout 60 /home/petmay01/linaro/qemu-for-merges/tests/guest-debug/run-test.py --gdb /usr/bin/gdb-multiar /build/gdb-veKdC1/gdb-8.1.1/gdb/regcache.c:122: internal-error: void* init_regcache_descr(gdbarch*): Asser A problem internal to GDB has been detected, further debugging may prove unreliable. This is a bug, please report it. For instructions, see: <http://www.gnu.org/software/gdb/bugs/>. Aborted (core dumped) /home/petmay01/linaro/qemu-for-merges/tests/tcg/multiarch/Makefile.target:51: recipe for target 'run-gdbst Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20201214133702.24088-1-peter.maydell@linaro.org
* target/i386: fix operand order for PDEP and PEXTPaolo Bonzini2020-12-102-0/+45
| | | | | | | | | | | | | | For PDEP and PEXT, the mask is provided in the memory (mod+r/m) operand, and therefore is loaded in s->T0 by gen_ldst_modrm. The source is provided in the second source operand (VEX.vvvv) and therefore is loaded in s->T1. Fix the order in which they are passed to the helpers. Reported-by: Lenard Szolnoki <blog@lenardszolnoki.com> Analyzed-by: Lenard Szolnoki <blog@lenardszolnoki.com> Fixes: https://bugs.launchpad.net/qemu/+bug/1605123 Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* tests/tcg/aarch64: Add bti smoke testsRichard Henderson2020-10-275-0/+243
| | | | | | | | | | | The note test requires gcc 10 for -mbranch-protection=standard. The mmap test uses PROT_BTI and does not require special compiler support. Acked-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201021173749.111103-13-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* tests/tcg/linux-test: Adjust getsockname for muslRichard Henderson2020-10-151-1/+1
| | | | | | | | | | Unlike glibc, musl does not use transparent unions to hide the different structures that overlap struct sockaddr. Add an explicit cast to work around this. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* Remove superfluous .gitignore filesThomas Huth2020-10-131-5/+0Star
| | | | | | | | Since we are now always doing out-of-tree builds, these gitignore files should not be necessary anymore. Message-Id: <20200919133637.72744-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* tests/tcg: reinstate or replace desired parts of rules.makPaolo Bonzini2020-09-302-3/+14
| | | | | | | | | | Commit 660f79309303d696531ffb394719dfab3e0c42c0 was a bit overzealous with respect to tests/tcg, which needed quiet-command and $(BUILD_DIR). Reinstate quiet-command, and replace $(BUILD_DIR) with just the current directory. Reported-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* plugins: move the more involved plugins to contribAlex Bennée2020-09-101-2/+1Star
| | | | | | | | | | | | | | We have an exploding complexity problem in the testing so lets just move the more involved plugins into contrib. tests/plugins still exist for the basic plugins that exercise the API. We restore the old pre-meson style Makefile for contrib as it also doubles as a guide for out-of-tree plugin builds. While we are at it add some examples to the documentation and a specific plugins build target. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200909112742.25730-11-alex.bennee@linaro.org>
* Makefile: inline the relevant parts of rules.makPaolo Bonzini2020-09-081-2/+0Star
| | | | | | Most of rules.mak is not used anymore, just inline what's needed. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* tests/tcg: Do not require FE_* exception bitsRichard Henderson2020-09-011-0/+17
| | | | | | | | | Define anything that is missing as 0, so that flags & FE_FOO is false for any missing FOO. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tests/tcg: Do not require FE_TOWARDZERORichard Henderson2020-09-012-0/+4
| | | | | | | | This is optional in ISO C, and not all cpus provide it. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tests/tcg: Add microblaze to arches filterRichard Henderson2020-09-011-1/+1
| | | | | | | | | Not attempting to use a single cross-compiler for both big-endian and little-endian at this time. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tests/tcg/xtensa: add DFP0 arithmetic testsMax Filippov2020-08-211-0/+162
| | | | | | Add test for basic double precision opcode properties. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* tests/tcg/xtensa: test double precision load/storeMax Filippov2020-08-211-0/+123
| | | | | | Add ldi[p]/sdi[p]/ldx[p]/sdx[p] opcode tests to test_lsc. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* tests/tcg/xtensa: add fp0 div and sqrt testsMax Filippov2020-08-212-0/+158
| | | | | | Test exact division/sqrt DFPU sequences. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* tests/tcg/xtensa: update test_lsc for DFPUMax Filippov2020-08-211-13/+34
| | | | | | | | DFPU doesn't have pre-increment FP load/store opcodes, it has post-increment opcodes instead. Test increment opcodes present in the current config. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* tests/tcg/xtensa: update test_fp1 for DFPUMax Filippov2020-08-211-28/+34
| | | | | | | | DFPU sets Invalid flag in FSR when at least one argument of FP comparison opcodes is NaN, SNaN for most opcodes, any NaN for olt/ole. Add checks for FSR and expected FSR values. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* tests/tcg/xtensa: update test_fp0_conv for DFPUMax Filippov2020-08-211-144/+155
| | | | | | | DFPU conversion opcodes update FSR flags. Add FSR parameters and expected FSR register values for the conversion tests. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* tests/tcg/xtensa: expand madd testsMax Filippov2020-08-211-0/+104
| | | | | | | Test that madd doesn't do rounding after multiplication. Test NaN propagation rules for FPU2000 and DFPU madd opcode. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* tests/tcg/xtensa: update test_fp0_arith for DFPUMax Filippov2020-08-212-97/+223
| | | | | | | DFPU arithmetic opcodes update FSR flags. Add FSR parameters and expected FSR register values for the arithmetic tests. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* tests/tcg/xtensa: fix test execution on ISSMax Filippov2020-08-211-5/+5
| | | | | | | Space for test results may be allocated in IRAM which is only word-accessible. Use full 32-bit words to access test results. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* meson: link emulators without Makefile.targetPaolo Bonzini2020-08-211-2/+2
| | | | | | | | The binaries move to the root directory, e.g. qemu-system-i386 or qemu-arm. This requires changes to qtests, CI, etc. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target/arm: Fix AddPAC error indicationRichard Henderson2020-08-032-1/+34
| | | | | | | | | | | | | | | | | | | | | The definition of top_bit used in this function is one higher than that used in the Arm ARM psuedo-code, which put the error indication at top_bit - 1 at the wrong place, which meant that it wasn't visible to Auth. Fixing the definition of top_bit requires more changes, because its most common use is for the count of bits in top_bit:bot_bit, which would then need to be computed as top_bit - bot_bit + 1. For now, prefer the minimal fix to the error indication alone. Fixes: 63ff0ca94cb Reported-by: Derrick McKee <derrick.mckee@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200728195706.11087-1-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: added comment about the divergence from the pseudocode] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* Merge remote-tracking branch ↵Peter Maydell2020-07-122-8/+17
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/stsquad/tags/pull-testing-and-misc-110720-2' into staging Testing and misc build updates: - tests/vm support for aarch64 VMs - tests/tcg better cross-compiler detection - update docker tooling to support registries - update docker support for xtensa - gitlab build docker images and store in registry - gitlab use docker images for builds - a number of skipIf updates to support move - linux-user MAP_FIXED_NOREPLACE fix - qht-bench compiler tweaks - configure fix for secret keyring - tsan fiber annotation clean-up - doc updates for mttcg/icount/gdbstub - fix cirrus to use brew bash for iotests - revert virtio-gpu breakage - fix LC_ALL to avoid sorting changes in iotests # gpg: Signature made Sat 11 Jul 2020 15:56:42 BST # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-testing-and-misc-110720-2: (50 commits) iotests: Set LC_ALL=C for sort Revert "vga: build virtio-gpu as module" tests: fix "make check-qtest" for modular builds .cirrus.yml: add bash to the brew packages tests/docker: update toolchain set in debian-xtensa-cross tests/docker: fall back more gracefully when pull fails docs: Add to gdbstub documentation the PhyMemMode docs/devel: add some notes on tcg-icount for developers docs/devel: convert and update MTTCG design document tests/qht-bench: Adjust threshold computation tests/qht-bench: Adjust testing rate by -1 travis.yml: Test also the other targets on s390x shippable: pull images from registry instead of building testing: add check-build target containers.yml: build with docker.py tooling gitlab: limit re-builds of the containers tests: improve performance of device-introspect-test gitlab: add avocado asset caching gitlab: enable check-tcg for linux-user tests linux-user/elfload: use MAP_FIXED_NOREPLACE in pgb_reserved_va ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * tests/docker: update toolchain set in debian-xtensa-crossMax Filippov2020-07-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Switch to the prebuilt xtensa toolchains release 2020.07. Drop csp toolchain as the csp core is not a part of QEMU. Add de233_fpu and dsp3400 toolchains to enable DFPU and FPU2000 tests. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> [AJB: fix path in configure.sh] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200708082347.27318-1-jcmvbkbc@gmail.com> Message-Id: <20200709141327.14631-13-alex.bennee@linaro.org>
| * tests/tcg: add more default compilers to configure.shAlex Bennée2020-07-111-5/+14
| | | | | | | | | | | | | | | | | | We were missing a bunch of compilers which we could use if they were locally installed. The defaults are based on Debian as they seem to be the best distro for well distributed cross-build compilers. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200701135652.1366-32-alex.bennee@linaro.org>
| * tests/docker: change tag naming scheme of our imagesAlex Bennée2020-07-111-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We've been misusing the tag naming scheme for some time by overloading the post : section with the image type. Really it should be saved for the revision of that particular build. Move the details to the other side so we have: qemu/image-name with the implied :latest version added by the tooling. Suggested-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200701135652.1366-18-alex.bennee@linaro.org>
* | target/i386: fix IEEE SSE floating-point exception raisingJoseph Myers2020-07-112-0/+817
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SSE instruction implementations all fail to raise the expected IEEE floating-point exceptions because they do nothing to convert the exception state from the softfloat machinery into the exception flags in MXCSR. Fix this by adding such conversions. Unlike for x87, emulated SSE floating-point operations might be optimized using hardware floating point on the host, and so a different approach is taken that is compatible with such optimizations. The required invariant is that all exceptions set in env->sse_status (other than "denormal operand", for which the SSE semantics are different from those in the softfloat code) are ones that are set in the MXCSR; the emulated MXCSR is updated lazily when code reads MXCSR, while when code sets MXCSR, the exceptions in env->sse_status are set accordingly. A few instructions do not raise all the exceptions that would be raised by the softfloat code, and those instructions are made to save and restore the softfloat exception state accordingly. Nothing is done about "denormal operand"; setting that (only for the case when input denormals are *not* flushed to zero, the opposite of the logic in the softfloat code for such an exception) will require custom code for relevant instructions, or else architecture-specific conditionals in the softfloat code for when to set such an exception together with custom code for various SSE conversion and rounding instructions that do not set that exception. Nothing is done about trapping exceptions (for which there is minimal and largely broken support in QEMU's emulation in the x87 case and no support at all in the SSE case). Signed-off-by: Joseph Myers <joseph@codesourcery.com> Message-Id: <alpine.DEB.2.21.2006252358000.3832@digraph.polyomino.org.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target/i386: reimplement fpatan using floatx80 operationsJoseph Myers2020-06-261-0/+1071
| | | | | | | | | | | | The x87 fpatan emulation is currently based around conversion to double. This is inherently unsuitable for a good emulation of any floatx80 operation. Reimplement using the soft-float operations, as for other such instructions. Signed-off-by: Joseph Myers <joseph@codesourcery.com> Message-Id: <alpine.DEB.2.21.2006230000340.24721@digraph.polyomino.org.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target/i386: reimplement fyl2x using floatx80 operationsJoseph Myers2020-06-261-0/+1161
| | | | | | | | | | | | | | | | | The x87 fyl2x emulation is currently based around conversion to double. This is inherently unsuitable for a good emulation of any floatx80 operation. Reimplement using the soft-float operations, building on top of the reimplementation of fyl2xp1 and factoring out code to be shared between the two instructions. The included test assumes that the result in round-to-nearest mode should always be one of the two closest floating-point numbers to the mathematically exact result (including that it should be exact, in the exact cases which cover more cases than for fyl2xp1). Signed-off-by: Joseph Myers <joseph@codesourcery.com> Message-Id: <alpine.DEB.2.21.2006172321530.20587@digraph.polyomino.org.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target/i386: reimplement fyl2xp1 using floatx80 operationsJoseph Myers2020-06-261-0/+1156
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The x87 fyl2xp1 emulation is currently based around conversion to double. This is inherently unsuitable for a good emulation of any floatx80 operation, even before considering that it is a particularly naive implementation using double (adding 1 then using log rather than attempting a better emulation using log1p). Reimplement using the soft-float operations, as was done for f2xm1; as in that case, m68k has related operations but not exactly this one and it seemed safest to implement directly rather than reusing the m68k code to avoid accumulation of errors. A test is included with many randomly generated inputs. The assumption of the test is that the result in round-to-nearest mode should always be one of the two closest floating-point numbers to the mathematical value of y * log2(x + 1); the implementation aims to do somewhat better than that (about 70 correct bits before rounding). I haven't investigated how accurate hardware is. Intel manuals describe a narrower range of valid arguments to this instruction than AMD manuals. The implementation accepts the wider range (it's needed anyway for the core code to be reusable in a subsequent patch reimplementing fyl2x), but the test only has inputs in the narrower range so that it's valid on hardware that may reject or produce poor results for inputs outside that range. Code in the previous implementation that sets C2 for some out-of-range arguments is not carried forward to the new implementation; C2 is undefined for this instruction and I suspect that code was just cut-and-pasted from the trigonometric instructions (fcos, fptan, fsin, fsincos) where C2 *is* defined to be set for out-of-range arguments. Signed-off-by: Joseph Myers <joseph@codesourcery.com> Message-Id: <alpine.DEB.2.21.2006172320190.20587@digraph.polyomino.org.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target/i386: reimplement f2xm1 using floatx80 operationsJoseph Myers2020-06-261-0/+1140
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The x87 f2xm1 emulation is currently based around conversion to double. This is inherently unsuitable for a good emulation of any floatx80 operation, even before considering that it is a particularly naive implementation using double (computing with pow and then subtracting 1 rather than attempting a better emulation using expm1). Reimplement using the soft-float operations, including additions and multiplications with higher precision where appropriate to limit accumulation of errors. I considered reusing some of the m68k code for transcendental operations, but the instructions don't generally correspond exactly to x87 operations (for example, m68k has 2^x and e^x - 1, but not 2^x - 1); to avoid possible accumulation of errors from applying multiple such operations each rounding to floatx80 precision, I wrote a direct implementation of 2^x - 1 instead. It would be possible in principle to make the implementation more efficient by doing the intermediate operations directly with significands, signs and exponents and not packing / unpacking floatx80 format for each operation, but that would make it significantly more complicated and it's not clear that's worthwhile; the m68k emulation doesn't try to do that. A test is included with many randomly generated inputs. The assumption of the test is that the result in round-to-nearest mode should always be one of the two closest floating-point numbers to the mathematical value of 2^x - 1; the implementation aims to do somewhat better than that (about 70 correct bits before rounding). I haven't investigated how accurate hardware is. Signed-off-by: Joseph Myers <joseph@codesourcery.com> Message-Id: <alpine.DEB.2.21.2006112341010.18393@digraph.polyomino.org.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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