diff options
| -rw-r--r-- | src/drivers/net/icplus.c | 809 | ||||
| -rw-r--r-- | src/drivers/net/icplus.h | 206 | ||||
| -rw-r--r-- | src/include/ipxe/errfile.h | 1 |
3 files changed, 1016 insertions, 0 deletions
diff --git a/src/drivers/net/icplus.c b/src/drivers/net/icplus.c new file mode 100644 index 00000000..4bed9242 --- /dev/null +++ b/src/drivers/net/icplus.c @@ -0,0 +1,809 @@ +/* + * Copyright (C) 2018 Sylvie Barlow <sylvie.c.barlow@gmail.com>. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA + * 02110-1301, USA. + * + * You can also choose to distribute this program under the terms of + * the Unmodified Binary Distribution Licence (as given in the file + * COPYING.UBDL), provided that you have satisfied its requirements. + */ + +FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL ); + +#include <stdint.h> +#include <string.h> +#include <unistd.h> +#include <errno.h> +#include <byteswap.h> +#include <ipxe/netdevice.h> +#include <ipxe/ethernet.h> +#include <ipxe/if_ether.h> +#include <ipxe/iobuf.h> +#include <ipxe/malloc.h> +#include <ipxe/pci.h> +#include "icplus.h" + +/** @file + * + * IC+ network driver + * + */ + +/****************************************************************************** + * + * Device reset + * + ****************************************************************************** + */ + +/** + * Reset hardware + * + * @v icp IC+ device + * @ret rc Return status code + */ +static int icplus_reset ( struct icplus_nic *icp ) { + uint32_t asicctrl; + unsigned int i; + + /* Trigger reset */ + writel ( ( ICP_ASICCTRL_GLOBALRESET | ICP_ASICCTRL_DMA | + ICP_ASICCTRL_FIFO | ICP_ASICCTRL_NETWORK | ICP_ASICCTRL_HOST | + ICP_ASICCTRL_AUTOINIT ), ( icp->regs + ICP_ASICCTRL ) ); + + /* Wait for reset to complete */ + for ( i = 0 ; i < ICP_RESET_MAX_WAIT_MS ; i++ ) { + + /* Check if device is ready */ + asicctrl = readl ( icp->regs + ICP_ASICCTRL ); + if ( ! ( asicctrl & ICP_ASICCTRL_RESETBUSY ) ) + return 0; + + /* Delay */ + mdelay ( 1 ); + } + + DBGC ( icp, "ICPLUS %p timed out waiting for reset (asicctrl %#08x)\n", + icp, asicctrl ); + return -ETIMEDOUT; +} + +/****************************************************************************** + * + * EEPROM interface + * + ****************************************************************************** + */ + +/** + * Read data from EEPROM + * + * @v nvs NVS device + * @v address Address from which to read + * @v data Data buffer + * @v len Length of data buffer + * @ret rc Return status code + */ +static int icplus_read_eeprom ( struct nvs_device *nvs, unsigned int address, + void *data, size_t len ) { + struct icplus_nic *icp = + container_of ( nvs, struct icplus_nic, eeprom ); + unsigned int i; + uint16_t eepromctrl; + uint16_t *data_word = data; + + /* Sanity check. We advertise a blocksize of one word, so + * should only ever receive single-word requests. + */ + assert ( len == sizeof ( *data_word ) ); + + /* Initiate read */ + writew ( ( ICP_EEPROMCTRL_OPCODE_READ | + ICP_EEPROMCTRL_ADDRESS ( address ) ), + ( icp->regs + ICP_EEPROMCTRL ) ); + + /* Wait for read to complete */ + for ( i = 0 ; i < ICP_EEPROM_MAX_WAIT_MS ; i++ ) { + + /* If read is not complete, delay 1ms and retry */ + eepromctrl = readw ( icp->regs + ICP_EEPROMCTRL ); + if ( eepromctrl & ICP_EEPROMCTRL_BUSY ) { + mdelay ( 1 ); + continue; + } + + /* Extract data */ + *data_word = cpu_to_le16 ( readw ( icp->regs + ICP_EEPROMDATA )); + return 0; + } + + DBGC ( icp, "ICPLUS %p timed out waiting for EEPROM read\n", icp ); + return -ETIMEDOUT; +} + +/** + * Write data to EEPROM + * + * @v nvs NVS device + * @v address Address to which to write + * @v data Data buffer + * @v len Length of data buffer + * @ret rc Return status code + */ +static int icplus_write_eeprom ( struct nvs_device *nvs, + unsigned int address __unused, + const void *data __unused, + size_t len __unused ) { + struct icplus_nic *icp = + container_of ( nvs, struct icplus_nic, eeprom ); + + DBGC ( icp, "ICPLUS %p EEPROM write not supported\n", icp ); + return -ENOTSUP; +} + +/** + * Initialise EEPROM + * + * @v icp IC+ device + */ +static void icplus_init_eeprom ( struct icplus_nic *icp ) { + + /* The hardware supports only single-word reads */ + icp->eeprom.word_len_log2 = ICP_EEPROM_WORD_LEN_LOG2; + icp->eeprom.size = ICP_EEPROM_MIN_SIZE_WORDS; + icp->eeprom.block_size = 1; + icp->eeprom.read = icplus_read_eeprom; + icp->eeprom.write = icplus_write_eeprom; +} + +/****************************************************************************** + * + * MII interface + * + ****************************************************************************** + */ + +/** Pin mapping for MII bit-bashing interface */ +static const uint8_t icplus_mii_bits[] = { + [MII_BIT_MDC] = ICP_PHYCTRL_MGMTCLK, + [MII_BIT_MDIO] = ICP_PHYCTRL_MGMTDATA, + [MII_BIT_DRIVE] = ICP_PHYCTRL_MGMTDIR, +}; + +/** + * Read input bit + * + * @v basher Bit-bashing interface + * @v bit_id Bit number + * @ret zero Input is a logic 0 + * @ret non-zero Input is a logic 1 + */ +static int icplus_mii_read_bit ( struct bit_basher *basher, + unsigned int bit_id ) { + struct icplus_nic *icp = container_of ( basher, struct icplus_nic, + miibit.basher ); + uint8_t mask = icplus_mii_bits[bit_id]; + uint8_t reg; + + DBG_DISABLE ( DBGLVL_IO ); + reg = readb ( icp->regs + ICP_PHYCTRL ); + DBG_ENABLE ( DBGLVL_IO ); + return ( reg & mask ); +} + +/** + * Set/clear output bit + * + * @v basher Bit-bashing interface + * @v bit_id Bit number + * @v data Value to write + */ +static void icplus_mii_write_bit ( struct bit_basher *basher, + unsigned int bit_id, unsigned long data ) { + struct icplus_nic *icp = container_of ( basher, struct icplus_nic, + miibit.basher ); + uint8_t mask = icplus_mii_bits[bit_id]; + uint8_t reg; + + DBG_DISABLE ( DBGLVL_IO ); + reg = readb ( icp->regs + ICP_PHYCTRL ); + reg &= ~mask; + reg |= ( data & mask ); + writeb ( reg, icp->regs + ICP_PHYCTRL ); + readb ( icp->regs + ICP_PHYCTRL ); /* Ensure write reaches chip */ + DBG_ENABLE ( DBGLVL_IO ); +} + +/** MII bit-bashing interface */ +static struct bit_basher_operations icplus_basher_ops = { + .read = icplus_mii_read_bit, + .write = icplus_mii_write_bit, +}; + +/****************************************************************************** + * + * Link state + * + ****************************************************************************** + */ + +/** + * Configure PHY + * + * @v icp IC+ device + * @ret rc Return status code + */ +static int icplus_init_phy ( struct icplus_nic *icp ) { + uint32_t asicctrl; + int rc; + + /* Find PHY address */ + if ( ( rc = mii_find ( &icp->mii ) ) != 0 ) { + DBGC ( icp, "ICPLUS %p could not find PHY address: %s\n", + icp, strerror ( rc ) ); + return rc; + } + + /* Configure PHY to advertise 1000Mbps if applicable */ + asicctrl = readl ( icp->regs + ICP_ASICCTRL ); + if ( asicctrl & ICP_ASICCTRL_PHYSPEED1000 ) { + if ( ( rc = mii_write ( &icp->mii, MII_CTRL1000, + ADVERTISE_1000FULL ) ) != 0 ) { + DBGC ( icp, "ICPLUS %p could not advertise 1000Mbps: " + "%s\n", icp, strerror ( rc ) ); + return rc; + } + } + + /* Reset PHY */ + if ( ( rc = mii_reset ( &icp->mii ) ) != 0 ) { + DBGC ( icp, "ICPLUS %p could not reset PHY: %s\n", + icp, strerror ( rc ) ); + return rc; + } + + return 0; +} + +/** + * Check link state + * + * @v netdev Network device + */ +static void icplus_check_link ( struct net_device *netdev ) { + struct icplus_nic *icp = netdev->priv; + uint8_t phyctrl; + + /* Read link status */ + phyctrl = readb ( icp->regs + ICP_PHYCTRL ); + DBGC ( icp, "ICPLUS %p PHY control is %02x\n", icp, phyctrl ); + + /* Update network device */ + if ( phyctrl & ICP_PHYCTRL_LINKSPEED ) { + netdev_link_up ( netdev ); + } else { + netdev_link_down ( netdev ); + } +} + +/****************************************************************************** + * + * Network device interface + * + ****************************************************************************** + */ + +/** + * Set descriptor ring base address + * + * @v icp IC+ device + * @v offset Register offset + * @v address Base address + */ +static inline void icplus_set_base ( struct icplus_nic *icp, unsigned int offset, + void *base ) { + physaddr_t phys = virt_to_bus ( base ); + + /* Program base address registers */ + writel ( ( phys & 0xffffffffUL ), + ( icp->regs + offset + ICP_BASE_LO ) ); + if ( sizeof ( phys ) > sizeof ( uint32_t ) ) { + writel ( ( ( ( uint64_t ) phys ) >> 32 ), + ( icp->regs + offset + ICP_BASE_HI ) ); + } else { + writel ( 0, ( icp->regs + offset + ICP_BASE_HI ) ); + } +} + +/** + * Create descriptor ring + * + * @v icp IC+ device + * @v ring Descriptor ring + * @ret rc Return status code + */ +static int icplus_create_ring ( struct icplus_nic *icp, struct icplus_ring *ring ) { + size_t len = ( sizeof ( ring->entry[0] ) * ICP_NUM_DESC ); + int rc; + unsigned int i; + struct icplus_descriptor *desc; + struct icplus_descriptor *next; + + /* Allocate descriptor ring */ + ring->entry = malloc_dma ( len, ICP_ALIGN ); + if ( ! ring->entry ) { + rc = -ENOMEM; + goto err_alloc; + } + + /* Initialise descriptor ring */ + memset ( ring->entry, 0, len ); + for ( i = 0 ; i < ICP_NUM_DESC ; i++ ) { + desc = &ring->entry[i]; + next = &ring->entry[ ( i + 1 ) % ICP_NUM_DESC ]; + desc->next = cpu_to_le64 ( virt_to_bus ( next ) ); + desc->flags = ( ICP_TX_UNALIGN | ICP_TX_INDICATE ); + desc->control = ( ICP_TX_SOLE_FRAG | ICP_DONE ); + } + + /* Reset transmit producer & consumer counters */ + ring->prod = 0; + ring->cons = 0; + + DBGC ( icp, "ICP %p %s ring at [%#08lx,%#08lx)\n", + icp, ( ( ring->listptr == ICP_TFDLISTPTR ) ? "TX" : "RX" ), + virt_to_bus ( ring->entry ), + ( virt_to_bus ( ring->entry ) + len ) ); + return 0; + + free_dma ( ring->entry, len ); + ring->entry = NULL; + err_alloc: + return rc; +} + +/** + * Destroy descriptor ring + * + * @v icp IC+ device + * @v ring Descriptor ring + */ +static void icplus_destroy_ring ( struct icplus_nic *icp __unused, + struct icplus_ring *ring ) { + size_t len = ( sizeof ( ring->entry[0] ) * ICP_NUM_DESC ); + + /* Free descriptor ring */ + free_dma ( ring->entry, len ); + ring->entry = NULL; +} + +/** + * Refill receive descriptor ring + * + * @v icp IC+ device + */ +void icplus_refill_rx ( struct icplus_nic *icp ) { + struct icplus_descriptor *desc; + struct io_buffer *iobuf; + unsigned int rx_idx; + physaddr_t address; + unsigned int refilled = 0; + + /* Refill ring */ + while ( ( icp->rx.prod - icp->rx.cons ) < ICP_NUM_DESC ) { + + /* Allocate I/O buffer */ + iobuf = alloc_iob ( ICP_RX_MAX_LEN ); + if ( ! iobuf ) { + /* Wait for next refill */ + break; + } + + /* Get next receive descriptor */ + rx_idx = ( icp->rx.prod++ % ICP_NUM_DESC ); + desc = &icp->rx.entry[rx_idx]; + + /* Populate receive descriptor */ + address = virt_to_bus ( iobuf->data ); + desc->data.address = cpu_to_le64 ( address ); + desc->data.len = cpu_to_le16 ( ICP_RX_MAX_LEN ); + wmb(); + desc->control = 0; + + /* Record I/O buffer */ + assert ( icp->rx_iobuf[rx_idx] == NULL ); + icp->rx_iobuf[rx_idx] = iobuf; + + DBGC2 ( icp, "ICP %p RX %d is [%llx,%llx)\n", icp, rx_idx, + ( ( unsigned long long ) address ), + ( ( unsigned long long ) address + ICP_RX_MAX_LEN ) ); + refilled++; + } + + /* Push descriptors to card, if applicable */ + if ( refilled ) { + wmb(); + writew ( ICP_DMACTRL_RXPOLLNOW, icp->regs + ICP_DMACTRL ); + } +} + +/** + * Open network device + * + * @v netdev Network device + * @ret rc Return status code + */ +static int icplus_open ( struct net_device *netdev ) { + struct icplus_nic *icp = netdev->priv; + int rc; + + /* Create transmit descriptor ring */ + if ( ( rc = icplus_create_ring ( icp, &icp->tx ) ) != 0 ) + goto err_create_tx; + + /* Create receive descriptor ring */ + if ( ( rc = icplus_create_ring ( icp, &icp->rx ) ) != 0 ) + goto err_create_rx; + + /* Program descriptor base address */ + icplus_set_base ( icp, icp->tx.listptr, icp->tx.entry ); + icplus_set_base ( icp, icp->rx.listptr, icp->rx.entry ); + + /* Enable receive mode */ + writew ( ( ICP_RXMODE_UNICAST | ICP_RXMODE_MULTICAST | + ICP_RXMODE_BROADCAST | ICP_RXMODE_ALLFRAMES ), + icp->regs + ICP_RXMODE ); + + /* Enable transmitter and receiver */ + writel ( ( ICP_MACCTRL_TXENABLE | ICP_MACCTRL_RXENABLE | + ICP_MACCTRL_DUPLEX ), icp->regs + ICP_MACCTRL ); + + /* Fill receive ring */ + icplus_refill_rx ( icp ); + + /* Check link state */ + icplus_check_link ( netdev ); + + return 0; + + icplus_reset ( icp ); + icplus_destroy_ring ( icp, &icp->rx ); + err_create_rx: + icplus_destroy_ring ( icp, &icp->tx ); + err_create_tx: + return rc; +} + +/** + * Close network device + * + * @v netdev Network device + */ +static void icplus_close ( struct net_device *netdev ) { + struct icplus_nic *icp = netdev->priv; + unsigned int i; + + /* Perform global reset */ + icplus_reset ( icp ); + + /* Destroy receive descriptor ring */ + icplus_destroy_ring ( icp, &icp->rx ); + + /* Destroy transmit descriptor ring */ + icplus_destroy_ring ( icp, &icp->tx ); + + /* Discard any unused receive buffers */ + for ( i = 0 ; i < ICP_NUM_DESC ; i++ ) { + if ( icp->rx_iobuf[i] ) + free_iob ( icp->rx_iobuf[i] ); + icp->rx_iobuf[i] = NULL; + } +} + +/** + * Transmit packet + * + * @v netdev Network device + * @v iobuf I/O buffer + * @ret rc Return status code + */ +static int icplus_transmit ( struct net_device *netdev, + struct io_buffer *iobuf ) { + struct icplus_nic *icp = netdev->priv; + struct icplus_descriptor *desc; + unsigned int tx_idx; + physaddr_t address; + + /* Check if ring is full */ + if ( ( icp->tx.prod - icp->tx.cons ) >= ICP_NUM_DESC ) { + DBGC ( icp, "ICP %p out of transmit descriptors\n", icp ); + return -ENOBUFS; + } + + /* Find TX descriptor entry to use */ + tx_idx = ( icp->tx.prod++ % ICP_NUM_DESC ); + desc = &icp->tx.entry[tx_idx]; + + /* Fill in TX descriptor */ + address = virt_to_bus ( iobuf->data ); + desc->data.address = cpu_to_le64 ( address ); + desc->data.len = cpu_to_le16 ( iob_len ( iobuf ) ); + wmb(); + desc->control = ICP_TX_SOLE_FRAG; + wmb(); + + /* Ring doorbell */ + writew ( ICP_DMACTRL_TXPOLLNOW, icp->regs + ICP_DMACTRL ); + + DBGC2 ( icp, "ICP %p TX %d is [%llx,%llx)\n", icp, tx_idx, + ( ( unsigned long long ) address ), + ( ( unsigned long long ) address + iob_len ( iobuf ) ) ); + DBGC2_HDA ( icp, virt_to_phys ( desc ), desc, sizeof ( *desc ) ); + return 0; +} + +/** + * Poll for completed packets + * + * @v netdev Network device + */ +static void icplus_poll_tx ( struct net_device *netdev ) { + struct icplus_nic *icp = netdev->priv; + struct icplus_descriptor *desc; + unsigned int tx_idx; + + /* Check for completed packets */ + while ( icp->tx.cons != icp->tx.prod ) { + + /* Get next transmit descriptor */ + tx_idx = ( icp->tx.cons % ICP_NUM_DESC ); + desc = &icp->tx.entry[tx_idx]; + + /* Stop if descriptor is still in use */ + if ( ! ( desc->control & ICP_DONE ) ) + return; + + /* Complete TX descriptor */ + DBGC2 ( icp, "ICP %p TX %d complete\n", icp, tx_idx ); + netdev_tx_complete_next ( netdev ); + icp->tx.cons++; + } +} + +/** + * Poll for received packets + * + * @v netdev Network device + */ +static void icplus_poll_rx ( struct net_device *netdev ) { + struct icplus_nic *icp = netdev->priv; + struct icplus_descriptor *desc; + struct io_buffer *iobuf; + unsigned int rx_idx; + size_t len; + + /* Check for received packets */ + while ( icp->rx.cons != icp->rx.prod ) { + + /* Get next transmit descriptor */ + rx_idx = ( icp->rx.cons % ICP_NUM_DESC ); + desc = &icp->rx.entry[rx_idx]; + + /* Stop if descriptor is still in use */ + if ( ! ( desc->control & ICP_DONE ) ) + return; + + /* Populate I/O buffer */ + iobuf = icp->rx_iobuf[rx_idx]; + icp->rx_iobuf[rx_idx] = NULL; + len = le16_to_cpu ( desc->len ); + iob_put ( iobuf, len ); + + /* Hand off to network stack */ + if ( desc->flags & ( ICP_RX_ERR_OVERRUN | ICP_RX_ERR_RUNT | + ICP_RX_ERR_ALIGN | ICP_RX_ERR_FCS | + ICP_RX_ERR_OVERSIZED | ICP_RX_ERR_LEN ) ) { + DBGC ( icp, "ICP %p RX %d error (length %zd, " + "flags %02x)\n", icp, rx_idx, len, desc->flags ); + netdev_rx_err ( netdev, iobuf, -EIO ); + } else { + DBGC2 ( icp, "ICP %p RX %d complete (length " + "%zd)\n", icp, rx_idx, len ); + netdev_rx ( netdev, iobuf ); + } + icp->rx.cons++; + } +} + +/** + * Poll for completed and received packets + * + * @v netdev Network device + */ +static void icplus_poll ( struct net_device *netdev ) { + struct icplus_nic *icp = netdev->priv; + uint16_t intstatus; + uint32_t txstatus; + + /* Check for interrupts */ + intstatus = readw ( icp->regs + ICP_INTSTATUS ); + + /* Poll for TX completions, if applicable */ + if ( intstatus & ICP_INTSTATUS_TXCOMPLETE ) { + txstatus = readl ( icp->regs + ICP_TXSTATUS ); + if ( txstatus & ICP_TXSTATUS_ERROR ) + DBGC ( icp, "ICP %p TX error: %08x\n", icp, txstatus ); + icplus_poll_tx ( netdev ); + } + + /* Poll for RX completions, if applicable */ + if ( intstatus & ICP_INTSTATUS_RXDMACOMPLETE ) { + writew ( ICP_INTSTATUS_RXDMACOMPLETE, icp->regs + ICP_INTSTATUS ); + icplus_poll_rx ( netdev ); + } + + /* Check link state, if applicable */ + if ( intstatus & ICP_INTSTATUS_LINKEVENT ) { + writew ( ICP_INTSTATUS_LINKEVENT, icp->regs + ICP_INTSTATUS ); + icplus_check_link ( netdev ); + } + + /* Refill receive ring */ + icplus_refill_rx ( icp ); +} + +/** + * Enable or disable interrupts + * + * @v netdev Network device + * @v enable Interrupts should be enabled + */ +static void icplus_irq ( struct net_device *netdev, int enable ) { + struct icplus_nic *icp = netdev->priv; + + DBGC ( icp, "ICPLUS %p does not yet support interrupts\n", icp ); + ( void ) enable; +} + +/** IC+ network device operations */ +static struct net_device_operations icplus_operations = { + .open = icplus_open, + .close = icplus_close, + .transmit = icplus_transmit, + .poll = icplus_poll, + .irq = icplus_irq, +}; + +/****************************************************************************** + * + * PCI interface + * + ****************************************************************************** + */ + +/** + * Probe PCI device + * + * @v pci PCI device + * @ret rc Return status code + */ +static int icplus_probe ( struct pci_device *pci ) { + struct net_device *netdev; + struct icplus_nic *icp; + int rc; + + /* Allocate and initialise net device */ + netdev = alloc_etherdev ( sizeof ( *icp ) ); + if ( ! netdev ) { + rc = -ENOMEM; + goto err_alloc; + } + netdev_init ( netdev, &icplus_operations ); + icp = netdev->priv; + pci_set_drvdata ( pci, netdev ); + netdev->dev = &pci->dev; + memset ( icp, 0, sizeof ( *icp ) ); + icp->miibit.basher.op = &icplus_basher_ops; + init_mii_bit_basher ( &icp->miibit ); + mii_init ( &icp->mii, &icp->miibit.mdio, 0 ); + icp->tx.listptr = ICP_TFDLISTPTR; + icp->rx.listptr = ICP_RFDLISTPTR; + + /* Fix up PCI device */ + adjust_pci_device ( pci ); + + /* Map registers */ + icp->regs = ioremap ( pci->membase, ICP_BAR_SIZE ); + if ( ! icp->regs ) { + rc = -ENODEV; + goto err_ioremap; + } + + /* Reset the NIC */ + if ( ( rc = icplus_reset ( icp ) ) != 0 ) + goto err_reset; + + /* Initialise EEPROM */ + icplus_init_eeprom ( icp ); + + /* Read EEPROM MAC address */ + if ( ( rc = nvs_read ( &icp->eeprom, ICP_EEPROM_MAC, + netdev->hw_addr, ETH_ALEN ) ) != 0 ) { + DBGC ( icp, "ICPLUS %p could not read EEPROM MAC address: %s\n", + icp, strerror ( rc ) ); + goto err_eeprom; + } + + /* Configure PHY */ + if ( ( rc = icplus_init_phy ( icp ) ) != 0 ) + goto err_phy; + + /* Register network device */ + if ( ( rc = register_netdev ( netdev ) ) != 0 ) + goto err_register_netdev; + + /* Set initial link state */ + icplus_check_link ( netdev ); + + return 0; + + unregister_netdev ( netdev ); + err_register_netdev: + err_phy: + err_eeprom: + icplus_reset ( icp ); + err_reset: + iounmap ( icp->regs ); + err_ioremap: + netdev_nullify ( netdev ); + netdev_put ( netdev ); + err_alloc: + return rc; +} + +/** + * Remove PCI device + * + * @v pci PCI device + */ +static void icplus_remove ( struct pci_device *pci ) { + struct net_device *netdev = pci_get_drvdata ( pci ); + struct icplus_nic *icp = netdev->priv; + + /* Unregister network device */ + unregister_netdev ( netdev ); + + /* Reset card */ + icplus_reset ( icp ); + + /* Free network device */ + iounmap ( icp->regs ); + netdev_nullify ( netdev ); + netdev_put ( netdev ); +} + +/** IC+ PCI device IDs */ +static struct pci_device_id icplus_nics[] = { + PCI_ROM ( 0x13f0, 0x1023, "ip1000a", "IP1000A", 0 ), +}; + +/** IC+ PCI driver */ +struct pci_driver icplus_driver __pci_driver = { + .ids = icplus_nics, + .id_count = ( sizeof ( icplus_nics ) / sizeof ( icplus_nics[0] ) ), + .probe = icplus_probe, + .remove = icplus_remove, +}; diff --git a/src/drivers/net/icplus.h b/src/drivers/net/icplus.h new file mode 100644 index 00000000..35fa422a --- /dev/null +++ b/src/drivers/net/icplus.h @@ -0,0 +1,206 @@ +#ifndef _ICPLUS_H +#define _ICPLUS_H + +/** @file + * + * IC+ network driver + * + */ + +#include <ipxe/nvs.h> +#include <ipxe/mii_bit.h> + +FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL ); + +/** BAR size */ +#define ICP_BAR_SIZE 0x200 + +/** Alignment requirement */ +#define ICP_ALIGN 0x8 + +/** Base address low register offset */ +#define ICP_BASE_LO 0x0 + +/** Base address high register offset */ +#define ICP_BASE_HI 0x4 + +/** ASIC control register (double word) */ +#define ICP_ASICCTRL 0x30 +#define ICP_ASICCTRL_PHYSPEED1000 0x00000040UL /**< PHY speed 1000 */ +#define ICP_ASICCTRL_GLOBALRESET 0x00010000UL /**< Global reset */ +#define ICP_ASICCTRL_DMA 0x00080000UL /**< DMA */ +#define ICP_ASICCTRL_FIFO 0x00100000UL /**< FIFO */ +#define ICP_ASICCTRL_NETWORK 0x00200000UL /**< Network */ +#define ICP_ASICCTRL_HOST 0x00400000UL /**< Host */ +#define ICP_ASICCTRL_AUTOINIT 0x00800000UL /**< Auto init */ +#define ICP_ASICCTRL_RESETBUSY 0x04000000UL /**< Reset busy */ + +/** Maximum time to wait for reset */ +#define ICP_RESET_MAX_WAIT_MS 1000 + +/** DMA control register (word/double word) */ +#define ICP_DMACTRL 0x00 +#define ICP_DMACTRL_RXPOLLNOW 0x0010 /**< Receive poll now */ +#define ICP_DMACTRL_TXPOLLNOW 0x1000 /**< Transmit poll now */ + +/** EEPROM control register (word) */ +#define ICP_EEPROMCTRL 0x4a +#define ICP_EEPROMCTRL_ADDRESS( x ) ( (x) << 0 ) /**< Address */ +#define ICP_EEPROMCTRL_OPCODE( x ) ( (x) << 8 ) /**< Opcode */ +#define ICP_EEPROMCTRL_OPCODE_READ \ + ICP_EEPROMCTRL_OPCODE ( 2 ) /**< Read register */ +#define ICP_EEPROMCTRL_BUSY 0x8000 /**< EEPROM busy */ + +/** Maximum time to wait for reading EEPROM */ +#define ICP_EEPROM_MAX_WAIT_MS 1000 + +/** EEPROM word length */ +#define ICP_EEPROM_WORD_LEN_LOG2 1 + +/** Minimum EEPROM size, in words */ +#define ICP_EEPROM_MIN_SIZE_WORDS 0x20 + +/** Address of MAC address within EEPROM */ +#define ICP_EEPROM_MAC 0x10 + +/** EEPROM data register (word) */ +#define ICP_EEPROMDATA 0x48 + +/** Interupt status register (word) */ +#define ICP_INTSTATUS 0x5e +#define ICP_INTSTATUS_TXCOMPLETE 0x0004 /**< TX complete */ +#define ICP_INTSTATUS_LINKEVENT 0x0100 /**< Link event */ +#define ICP_INTSTATUS_RXDMACOMPLETE 0x0400 /**< RX DMA complete */ + +/** MAC control register (double word) */ +#define ICP_MACCTRL 0x6c +#define ICP_MACCTRL_DUPLEX 0x00000020UL /**< Duplex select */ +#define ICP_MACCTRL_TXENABLE 0x01000000UL /**< TX enable */ +#define ICP_MACCTRL_TXDISABLE 0x02000000UL /**< TX disable */ +#define ICP_MACCTRL_RXENABLE 0x08000000UL /**< RX enable */ +#define ICP_MACCTRL_RXDISABLE 0x10000000UL /**< RX disable */ + +/** PHY control register (byte) */ +#define ICP_PHYCTRL 0x76 +#define ICP_PHYCTRL_MGMTCLK 0x01 /**< Management clock */ +#define ICP_PHYCTRL_MGMTDATA 0x02 /**< Management data */ +#define ICP_PHYCTRL_MGMTDIR 0x04 /**< Management direction */ +#define ICP_PHYCTRL_LINKSPEED 0xc0 /**< Link speed */ + +/** Receive mode register (word) */ +#define ICP_RXMODE 0x88 +#define ICP_RXMODE_UNICAST 0x0001 /**< Receive unicast */ +#define ICP_RXMODE_MULTICAST 0x0002 /**< Receice multicast */ +#define ICP_RXMODE_BROADCAST 0x0004 /**< Receive broadcast */ +#define ICP_RXMODE_ALLFRAMES 0x0008 /**< Receive all frames */ + +/** List pointer receive register */ +#define ICP_RFDLISTPTR 0x1c + +/** List pointer transmit register */ +#define ICP_TFDLISTPTR 0x10 + +/** Transmit status register */ +#define ICP_TXSTATUS 0x60 +#define ICP_TXSTATUS_ERROR 0x00000001UL /**< TX error */ + +/** Data fragment */ +union icplus_fragment { + /** Address of data */ + uint64_t address; + /** Length */ + struct { + /** Reserved */ + uint8_t reserved[6]; + /** Length of data */ + uint16_t len; + }; +}; + +/** Transmit or receive descriptor */ +struct icplus_descriptor { + /** Address of next descriptor */ + uint64_t next; + /** Actual length */ + uint16_t len; + /** Flags */ + uint8_t flags; + /** Control */ + uint8_t control; + /** VLAN */ + uint16_t vlan; + /** Reserved */ + uint16_t reserved_a; + /** Data buffer */ + union icplus_fragment data; + /** Reserved */ + uint8_t reserved_b[8]; +}; + +/** Descriptor complete */ +#define ICP_DONE 0x80 + +/** Transmit alignment disabled */ +#define ICP_TX_UNALIGN 0x01 + +/** Request transmit completion */ +#define ICP_TX_INDICATE 0x40 + +/** Sole transmit fragment */ +#define ICP_TX_SOLE_FRAG 0x01 + +/** Recieve frame overrun error */ +#define ICP_RX_ERR_OVERRUN 0x01 + +/** Receive runt frame error */ +#define ICP_RX_ERR_RUNT 0x02 + +/** Receive alignment error */ +#define ICP_RX_ERR_ALIGN 0x04 + +/** Receive FCS error */ +#define ICP_RX_ERR_FCS 0x08 + +/** Receive oversized frame error */ +#define ICP_RX_ERR_OVERSIZED 0x10 + +/** Recieve length error */ +#define ICP_RX_ERR_LEN 0x20 + +/** Descriptor ring */ +struct icplus_ring { + /** Producer counter */ + unsigned int prod; + /** Consumer counter */ + unsigned int cons; + /** Ring entries */ + struct icplus_descriptor *entry; + /* List pointer register */ + unsigned int listptr; +}; + +/** Number of descriptors */ +#define ICP_NUM_DESC 4 + +/** Maximum receive packet length */ +#define ICP_RX_MAX_LEN ETH_FRAME_LEN + +/** An IC+ network card */ +struct icplus_nic { + /** Registers */ + void *regs; + /** EEPROM */ + struct nvs_device eeprom; + /** MII bit bashing interface */ + struct mii_bit_basher miibit; + /** MII device */ + struct mii_device mii; + /** Transmit descriptor ring */ + struct icplus_ring tx; + /** Receive descriptor ring */ + struct icplus_ring rx; + /** Receive I/O buffers */ + struct io_buffer *rx_iobuf[ICP_NUM_DESC]; +}; + +#endif /* _ICPLUS_H */ diff --git a/src/include/ipxe/errfile.h b/src/include/ipxe/errfile.h index e465d188..8e989e42 100644 --- a/src/include/ipxe/errfile.h +++ b/src/include/ipxe/errfile.h @@ -203,6 +203,7 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL ); #define ERRFILE_smscusb ( ERRFILE_DRIVER | 0x00c70000 ) #define ERRFILE_lan78xx ( ERRFILE_DRIVER | 0x00c80000 ) #define ERRFILE_ena ( ERRFILE_DRIVER | 0x00c90000 ) +#define ERRFILE_icplus ( ERRFILE_DRIVER | 0x00ca0000 ) #define ERRFILE_aoe ( ERRFILE_NET | 0x00000000 ) #define ERRFILE_arp ( ERRFILE_NET | 0x00010000 ) |