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| author | Catalin Marinas | 2014-04-04 12:49:05 +0200 |
|---|---|---|
| committer | Catalin Marinas | 2014-05-09 16:47:46 +0200 |
| commit | 6400111399e16a535231ebd76389c894ea1837ff (patch) | |
| tree | 1cc0bda4fc7b2c8e1706fcff940b011235c14d3b /arch/arm64/include/asm/esr.h | |
| parent | arm64: Implement cache_line_size() based on CTR_EL0.CWG (diff) | |
| download | kernel-qcow2-linux-6400111399e16a535231ebd76389c894ea1837ff.tar.gz kernel-qcow2-linux-6400111399e16a535231ebd76389c894ea1837ff.tar.xz kernel-qcow2-linux-6400111399e16a535231ebd76389c894ea1837ff.zip | |
arm64: Remove boot thread synchronisation for spin-table release method
The synchronisation with the boot thread already happens in __cpu_up()
via wait_for_completion_timeout(). In addition, __cpu_up() calls are
protected by the cpu_add_remove_lock mutex and already serialised.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/esr.h')
0 files changed, 0 insertions, 0 deletions