Merge tag 'xtensa-20181228' of git://github.com/jcmvbkbc/linux-xtensa

Pull Xtensa updates from Max Filippov:

 - switch to generated syscall table

 - switch ptrace to regsets, use regsets for core dumps

 - complete tracehook implementation

 - add syscall tracepoints support

 - add jumplabels support

 - add memtest support

 - drop unused/duplicated code from entry.S, ptrace.c, coprocessor.S,
   elf.h and syscall.h

 - clean up warnings caused by WSR/RSR macros

 - clean up DTC warnings about SPI controller node names in xtfpga.dtsi

 - simplify coprocessor.S

 - get rid of explicit 'l32r' instruction usage in assembly

* tag 'xtensa-20181228' of git://github.com/jcmvbkbc/linux-xtensa: (25 commits)
  xtensa: implement jump_label support
  xtensa: implement syscall tracepoints
  xtensa: implement tracehook functions and enable HAVE_ARCH_TRACEHOOK
  xtensa: enable CORE_DUMP_USE_REGSET
  xtensa: implement TIE regset
  xtensa: implement task_user_regset_view
  xtensa: call do_syscall_trace_{enter,leave} selectively
  xtensa: use NO_SYSCALL instead of -1
  xtensa: define syscall_get_arch()
  Move EM_XTENSA to uapi/linux/elf-em.h
  xtensa: support memtest
  xtensa: don't use l32r opcode directly
  xtensa: xtfpga.dtsi: fix dtc warnings about SPI
  xtensa: don't clear cpenable unconditionally on release
  xtensa: simplify coprocessor.S
  xtensa: clean up WSR*/RSR*/get_sr/set_sr
  xtensa: drop unused declarations from elf.h
  xtensa: clean up syscall.h
  xtensa: drop unused coprocessor helper functions
  xtensa: drop custom PTRACE_{PEEK,POKE}{TEXT,DATA}
  ...

1 files changed, 13 insertions, 5 deletions

diff --git a/arch/xtensa/include/asm/processor.h b/arch/xtensa/include/asm/processor.h
index 34a23016dd14..f7dd895b2353 100644
--- a/arch/xtensa/include/asm/processor.h
+++ b/arch/xtensa/include/asm/processor.h
@@ -13,6 +13,7 @@
 #include <variant/core.h>
 
 #include <linux/compiler.h>
+#include <linux/stringify.h>
 #include <asm/ptrace.h>
 #include <asm/types.h>
 #include <asm/regs.h>
@@ -212,11 +213,18 @@ extern unsigned long get_wchan(struct task_struct *p);
 
 /* Special register access. */
 
-#define WSR(v,sr) __asm__ __volatile__ ("wsr %0,"__stringify(sr) :: "a"(v));
-#define RSR(v,sr) __asm__ __volatile__ ("rsr %0,"__stringify(sr) : "=a"(v));
-
-#define set_sr(x,sr) ({unsigned int v=(unsigned int)x; WSR(v,sr);})
-#define get_sr(sr) ({unsigned int v; RSR(v,sr); v; })
+#define xtensa_set_sr(x, sr) \
+	({ \
+	 unsigned int v = (unsigned int)(x); \
+	 __asm__ __volatile__ ("wsr %0, "__stringify(sr) :: "a"(v)); \
+	 })
+
+#define xtensa_get_sr(sr) \
+	({ \
+	 unsigned int v; \
+	 __asm__ __volatile__ ("rsr %0, "__stringify(sr) : "=a"(v)); \
+	 v; \
+	 })
 
 #ifndef XCHAL_HAVE_EXTERN_REGS
 #define XCHAL_HAVE_EXTERN_REGS 0