diff options
| author | Justin Swartz | 2019-05-16 14:44:36 +0200 |
|---|---|---|
| committer | Heiko Stuebner | 2019-05-20 01:00:53 +0200 |
| commit | f14b3c91ec5f013a8be337541fd34a42a31fb074 (patch) | |
| tree | b04ec9d53bde97e991165fcdf0080d29c52e8a02 /drivers/clk/rockchip | |
| parent | clk: rockchip: Slightly more accurate math in rockchip_mmc_get_phase() (diff) | |
| download | kernel-qcow2-linux-f14b3c91ec5f013a8be337541fd34a42a31fb074.tar.gz kernel-qcow2-linux-f14b3c91ec5f013a8be337541fd34a42a31fb074.tar.xz kernel-qcow2-linux-f14b3c91ec5f013a8be337541fd34a42a31fb074.zip | |
clk: rockchip: add 1.464GHz cpu-clock rate to rk3228
Add missing 1.464GHz clock rate to rk3228_cpuclk_rates[], which gets
referenced in the operating points but wasn't defined till now.
Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers/clk/rockchip')
| -rw-r--r-- | drivers/clk/rockchip/clk-rk3228.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/rockchip/clk-rk3228.c b/drivers/clk/rockchip/clk-rk3228.c index 7176003b5c7c..0801da8b1ed6 100644 --- a/drivers/clk/rockchip/clk-rk3228.c +++ b/drivers/clk/rockchip/clk-rk3228.c @@ -110,6 +110,7 @@ static struct rockchip_cpuclk_rate_table rk3228_cpuclk_rates[] __initdata = { RK3228_CPUCLK_RATE(1608000000, 1, 7), RK3228_CPUCLK_RATE(1512000000, 1, 7), RK3228_CPUCLK_RATE(1488000000, 1, 5), + RK3228_CPUCLK_RATE(1464000000, 1, 5), RK3228_CPUCLK_RATE(1416000000, 1, 5), RK3228_CPUCLK_RATE(1392000000, 1, 5), RK3228_CPUCLK_RATE(1296000000, 1, 5), |