diff options
| author | Rahul Sharma | 2013-06-11 08:54:03 +0200 |
|---|---|---|
| committer | Inki Dae | 2013-06-28 14:13:56 +0200 |
| commit | 59956d35a8618235ea715280b49447bb36f2c975 (patch) | |
| tree | 7e85349cb1d0f4934c63162663836d8c03e1fc19 /drivers/gpu/drm/exynos/exynos_hdmi.c | |
| parent | drm/exynos: Prepare/Unprepare HDMI subsystem clocks (diff) | |
| download | kernel-qcow2-linux-59956d35a8618235ea715280b49447bb36f2c975.tar.gz kernel-qcow2-linux-59956d35a8618235ea715280b49447bb36f2c975.tar.xz kernel-qcow2-linux-59956d35a8618235ea715280b49447bb36f2c975.zip | |
drm/exynos: add mout_hdmi clock in hdmi driver to change parent
HDMI driver needs to configure the mout_hdmi mux clock to change
the parent between sclk_hdmiphy and sclk_pixel.
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Diffstat (limited to 'drivers/gpu/drm/exynos/exynos_hdmi.c')
| -rw-r--r-- | drivers/gpu/drm/exynos/exynos_hdmi.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index 83bd496ca6a3..ce13a23a8274 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -83,6 +83,7 @@ struct hdmi_resources { struct clk *sclk_pixel; struct clk *sclk_hdmiphy; struct clk *hdmiphy; + struct clk *mout_hdmi; struct regulator_bulk_data *regul_bulk; int regul_count; }; @@ -1112,7 +1113,7 @@ static void hdmi_v13_mode_apply(struct hdmi_context *hdata) } clk_disable_unprepare(hdata->res.sclk_hdmi); - clk_set_parent(hdata->res.sclk_hdmi, hdata->res.sclk_hdmiphy); + clk_set_parent(hdata->res.mout_hdmi, hdata->res.sclk_hdmiphy); clk_prepare_enable(hdata->res.sclk_hdmi); /* enable HDMI and timing generator */ @@ -1279,7 +1280,7 @@ static void hdmi_v14_mode_apply(struct hdmi_context *hdata) } clk_disable_unprepare(hdata->res.sclk_hdmi); - clk_set_parent(hdata->res.sclk_hdmi, hdata->res.sclk_hdmiphy); + clk_set_parent(hdata->res.mout_hdmi, hdata->res.sclk_hdmiphy); clk_prepare_enable(hdata->res.sclk_hdmi); /* enable HDMI and timing generator */ @@ -1305,7 +1306,7 @@ static void hdmiphy_conf_reset(struct hdmi_context *hdata) u32 reg; clk_disable_unprepare(hdata->res.sclk_hdmi); - clk_set_parent(hdata->res.sclk_hdmi, hdata->res.sclk_pixel); + clk_set_parent(hdata->res.mout_hdmi, hdata->res.sclk_pixel); clk_prepare_enable(hdata->res.sclk_hdmi); /* operation mode */ @@ -1812,8 +1813,13 @@ static int hdmi_resources_init(struct hdmi_context *hdata) DRM_ERROR("failed to get clock 'hdmiphy'\n"); goto fail; } + res->mout_hdmi = devm_clk_get(dev, "mout_hdmi"); + if (IS_ERR(res->mout_hdmi)) { + DRM_ERROR("failed to get clock 'mout_hdmi'\n"); + goto fail; + } - clk_set_parent(res->sclk_hdmi, res->sclk_pixel); + clk_set_parent(res->mout_hdmi, res->sclk_pixel); res->regul_bulk = devm_kzalloc(dev, ARRAY_SIZE(supply) * sizeof(res->regul_bulk[0]), GFP_KERNEL); |