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| author | Joao Pinto | 2016-08-17 20:26:07 +0200 |
|---|---|---|
| committer | Bjorn Helgaas | 2016-08-17 21:43:41 +0200 |
| commit | d8bbeb39fbf3ff06b6adae9d336f44bee4e3f3ec (patch) | |
| tree | ced1d20fcf583996ac48bf4b1e92357d0d357738 /drivers/pci | |
| parent | PCI: designware: Move link wait definitions to .c file (diff) | |
| download | kernel-qcow2-linux-d8bbeb39fbf3ff06b6adae9d336f44bee4e3f3ec.tar.gz kernel-qcow2-linux-d8bbeb39fbf3ff06b6adae9d336f44bee4e3f3ec.tar.xz kernel-qcow2-linux-d8bbeb39fbf3ff06b6adae9d336f44bee4e3f3ec.zip | |
PCI: designware: Wait for iATU enable
Add a loop with timeout to make sure the iATU is really enabled before
subsequent config and I/O accesses.
[bhelgaas: split to separate patch, use dev_err() instead of dev_dbg()]
Signed-off-by: Joao Pinto <jpinto@synopsys.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/host/pcie-designware.c | 18 |
1 files changed, 15 insertions, 3 deletions
diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c index e99f56ecd61d..947fac37cf1b 100644 --- a/drivers/pci/host/pcie-designware.c +++ b/drivers/pci/host/pcie-designware.c @@ -31,7 +31,12 @@ #define LINK_WAIT_USLEEP_MIN 90000 #define LINK_WAIT_USLEEP_MAX 100000 -/* Synopsis specific PCIE configuration registers */ +/* Parameters for the waiting for iATU enabled routine */ +#define LINK_WAIT_MAX_IATU_RETRIES 5 +#define LINK_WAIT_IATU_MIN 9000 +#define LINK_WAIT_IATU_MAX 10000 + +/* Synopsys-specific PCIe configuration registers */ #define PCIE_PORT_LINK_CONTROL 0x710 #define PORT_LINK_MODE_MASK (0x3f << 16) #define PORT_LINK_MODE_1_LANES (0x1 << 16) @@ -157,7 +162,7 @@ static int dw_pcie_wr_own_conf(struct pcie_port *pp, int where, int size, static void dw_pcie_prog_outbound_atu(struct pcie_port *pp, int index, int type, u64 cpu_addr, u64 pci_addr, u32 size) { - u32 val; + u32 retries, val; dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | index, PCIE_ATU_VIEWPORT); @@ -174,7 +179,14 @@ static void dw_pcie_prog_outbound_atu(struct pcie_port *pp, int index, * Make sure ATU enable takes effect before any subsequent config * and I/O accesses. */ - val = dw_pcie_readl_rc(pp, PCIE_ATU_CR2); + for (retries = 0; retries < LINK_WAIT_MAX_IATU_RETRIES; retries++) { + val = dw_pcie_readl_rc(pp, PCIE_ATU_CR2); + if (val == PCIE_ATU_ENABLE) + return; + + usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX); + } + dev_err(pp->dev, "iATU is not being enabled\n"); } static struct irq_chip dw_msi_irq_chip = { |