diff options
| author | Stephen Boyd | 2017-06-15 01:48:21 +0200 |
|---|---|---|
| committer | Stephen Boyd | 2017-06-15 01:48:21 +0200 |
| commit | 9c861f33284cd77be3077cacc4c04303b3a60ebe (patch) | |
| tree | 7abdfba89c5856888b6c72e83b73e91ed37c5069 /include/dt-bindings/clock | |
| parent | Merge tag 'clk-v4.13-samsung' of git://git.kernel.org/pub/scm/linux/kernel/gi... (diff) | |
| parent | Merge tag 'sunxi-clk-fixes-for-4.12' of https://git.kernel.org/pub/scm/linux/... (diff) | |
| download | kernel-qcow2-linux-9c861f33284cd77be3077cacc4c04303b3a60ebe.tar.gz kernel-qcow2-linux-9c861f33284cd77be3077cacc4c04303b3a60ebe.tar.xz kernel-qcow2-linux-9c861f33284cd77be3077cacc4c04303b3a60ebe.zip | |
Merge branch 'clk-fixes' into clk-next
* clk-fixes:
clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM
clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM
dt-bindings: clock: sunxi-ccu: Add pll-periph to PRCM's needed clocks
clk: sunxi-ng: enable SUNXI_CCU_MP for PRCM
clk: sunxi-ng: v3s: Fix usb otg device reset bit
clk: sunxi-ng: a31: Correct lcd1-ch1 clock register offset
Diffstat (limited to 'include/dt-bindings/clock')
| -rw-r--r-- | include/dt-bindings/clock/sun50i-a64-ccu.h | 2 | ||||
| -rw-r--r-- | include/dt-bindings/clock/sun8i-h3-ccu.h | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h b/include/dt-bindings/clock/sun50i-a64-ccu.h index 370c0a0473fc..d66432c6e675 100644 --- a/include/dt-bindings/clock/sun50i-a64-ccu.h +++ b/include/dt-bindings/clock/sun50i-a64-ccu.h @@ -43,6 +43,8 @@ #ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_ #define _DT_BINDINGS_CLK_SUN50I_A64_H_ +#define CLK_PLL_PERIPH0 11 + #define CLK_BUS_MIPI_DSI 28 #define CLK_BUS_CE 29 #define CLK_BUS_DMA 30 diff --git a/include/dt-bindings/clock/sun8i-h3-ccu.h b/include/dt-bindings/clock/sun8i-h3-ccu.h index c2afc41d6964..e139fe5c62ec 100644 --- a/include/dt-bindings/clock/sun8i-h3-ccu.h +++ b/include/dt-bindings/clock/sun8i-h3-ccu.h @@ -43,6 +43,8 @@ #ifndef _DT_BINDINGS_CLK_SUN8I_H3_H_ #define _DT_BINDINGS_CLK_SUN8I_H3_H_ +#define CLK_PLL_PERIPH0 9 + #define CLK_CPUX 14 #define CLK_BUS_CE 20 |