diff options
| author | Stephen Boyd | 2019-07-12 20:10:52 +0200 |
|---|---|---|
| committer | Stephen Boyd | 2019-07-12 20:10:52 +0200 |
| commit | 1f5d580cabc6bdc595116f4ca16cfb226f2b8b5c (patch) | |
| tree | 53919af912ec25ba0e7da091f1c1fbc86a561040 /include/dt-bindings | |
| parent | Merge branches 'clk-pwm-duty', 'clk-bcm', 'clk-mtk', 'clk-qcom-msm8998-gpu' a... (diff) | |
| parent | clk: qcom: gdsc: WARN when failing to toggle (diff) | |
| parent | MIPS: Remove dead code (diff) | |
| parent | clk: gcc-qcs404: Add PCIe resets (diff) | |
| parent | clk: xgene: Don't build COMMON_CLK_XGENE by default (diff) | |
| parent | Merge tag 'clk-meson-5.3-1' of https://github.com/BayLibre/clk-meson into clk... (diff) | |
| download | kernel-qcow2-linux-1f5d580cabc6bdc595116f4ca16cfb226f2b8b5c.tar.gz kernel-qcow2-linux-1f5d580cabc6bdc595116f4ca16cfb226f2b8b5c.tar.xz kernel-qcow2-linux-1f5d580cabc6bdc595116f4ca16cfb226f2b8b5c.zip | |
Merge branches 'clk-qcom-gdsc-warn', 'clk-ingenic', 'clk-qcom-qcs404-reset', 'clk-xgene-limit' and 'clk-meson' into clk-next
* clk-qcom-gdsc-warn:
clk: qcom: gdsc: WARN when failing to toggle
* clk-ingenic:
MIPS: Remove dead code
clk: ingenic: Remove unused functions
MIPS: jz4740: PM: Let CGU driver suspend clocks and set sleep mode
clk: ingenic: Handle setting the Low-Power Mode bit
clk: ingenic: Add missing header in cgu.h
clk: ingenic/jz4725b: Fix "pll half" divider not read/written properly
clk: ingenic/jz4725b: Fix incorrect dividers for main clocks
clk: ingenic/jz4770: Fix incorrect dividers for main clocks
clk: ingenic/jz4740: Fix incorrect dividers for main clocks
clk: ingenic: Add support for divider tables
* clk-qcom-qcs404-reset:
clk: gcc-qcs404: Add PCIe resets
* clk-xgene-limit:
clk: xgene: Don't build COMMON_CLK_XGENE by default
* clk-meson:
clk: meson: g12a: mark fclk_div3 as critical
clk: meson: g12a: Add support for G12B CPUB clocks
dt-bindings: clk: meson: add g12b periph clock controller bindings
clk: meson-g12a: add temperature sensor clocks
dt-bindings: clk: g12a-clkc: add Temperature Sensor clock IDs
clk: meson: meson8b: add the cts_i958 clock
clk: meson: meson8b: add the cts_mclk_i958 clocks
clk: meson: meson8b: add the cts_amclk clocks
dt-bindings: clock: meson8b: add the audio clocks
clk: meson: g12a: add controller register init
clk: meson: eeclk: add init regs
clk: meson: g12a: add mpll register init sequences
clk: meson: mpll: add init callback and regs
clk: meson: axg: spread spectrum is on mpll2
clk: meson: gxbb: no spread spectrum on mpll0
clk: meson: mpll: properly handle spread spectrum
clk: meson: meson8b: fix a typo in the VPU parent names array variable
clk: meson: fix MPLL 50M binding id typo