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| author | Will Deacon | 2015-04-23 21:08:49 +0200 |
|---|---|---|
| committer | Will Deacon | 2015-07-27 16:28:51 +0200 |
| commit | c342f78217e822d2178265b0b1de232eeb717149 (patch) | |
| tree | 2c1de7284bb6671aa9cb4e8a0f85a119d64de3a2 /init | |
| parent | arm64: xchg: patch in lse instructions when supported by the CPU (diff) | |
| download | kernel-qcow2-linux-c342f78217e822d2178265b0b1de232eeb717149.tar.gz kernel-qcow2-linux-c342f78217e822d2178265b0b1de232eeb717149.tar.xz kernel-qcow2-linux-c342f78217e822d2178265b0b1de232eeb717149.zip | |
arm64: cmpxchg: patch in lse instructions when supported by the CPU
On CPUs which support the LSE atomic instructions introduced in ARMv8.1,
it makes sense to use them in preference to ll/sc sequences.
This patch introduces runtime patching of our cmpxchg primitives so that
the LSE cas instruction is used instead.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'init')
0 files changed, 0 insertions, 0 deletions