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path: root/drivers/gpu/drm/amd/display/dc/dcn10
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* drm/amdgpu: add license to MakefilesAlex Deucher2017-12-071-0/+21
| | | | | | | | | Was missing license text. Acked-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/include:cleanup raven1 nbio header files.Feifei Xu2017-12-061-1/+1
| | | | | | | | | Cleanup asic_reg/raven1/NBIO folder. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/include:cleanup raven1 mmhub header files.Feifei Xu2017-12-061-2/+2
| | | | | | | | | Cleanup asic_reg/raven1/MMHUB folder.Remove unused mmhub_9_1_default.h Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/include:cleanup raven1 dcn header files.Feifei Xu2017-12-061-2/+2
| | | | | | | | | | Cleanup asic_reg/raven1/DCN folder.Remove unused dcn_1_0_default.h. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/include:cleanup vega10 header files.Feifei Xu2017-12-061-1/+1
| | | | | | | | Remove asic_reg/vega10 folder. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Set OPP default values in init_hwAndrew Jiang2017-12-062-11/+12
| | | | | | | | | | | | | | | On S3 resume, we do not reconstruct OPP, but we do need to reinitialize some of its values to the default ones. Therefore, move those lines out of the OPP constructor and into init_hw. Also reset the hubp power gated flag, since nothing is power gated at init_hw. Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Only program watermark for full update.Yongqiang Sun2017-12-062-27/+22Star
| | | | | | | | | | For scaling and position change, it isn't necessary to program watermark and check P-State as well. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: move csc matrix to hw_sharedYue Hin Lau2017-12-061-26/+0Star
| | | | | | | Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: update output csc matrix valuesYue Hin Lau2017-12-062-22/+16Star
| | | | | | | Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Only update output transfer function for full type.Yongqiang Sun2017-12-061-7/+16
| | | | | | | | | | | dcn10_translate_regamma_to_hw_format costs 750us to run, it cannot be called within isr, check update flag before calling, only do it for full update. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: performance profiling instrumentationTony Cheng2017-12-061-0/+4
| | | | | | | Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: fix opp header register defineYue Hin Lau2017-12-061-11/+14
| | | | | | | Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Update dchub and dpp as per update flags.Yongqiang Sun2017-12-061-74/+117
| | | | | | | | | | | Check update flags and update dchub and dpp as per flags, reduce reg access from 347 to 200, duration time reduce to 170us. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: call set_mpc_output_csc from hwsequencerYue Hin Lau2017-12-062-67/+140
| | | | | | | Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix use before initialize warningLeo (Sunpeng) Li2017-12-061-1/+1
| | | | | | | | on stream_for_cursor. Initialize to NULL. Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Optimize front end programming.Yongqiang Sun2017-12-061-108/+111
| | | | | | | | | | | for video scaling changes, Reduce reg access count from 1044 to 447, duration time from 4.6ms to 3ms. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix unused variable warningLeo (Sunpeng) Li2017-12-061-1/+0Star
| | | | | | | | | 'struct mpc *mpc' is not used. Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Rename pitch_alignment to linear_pitch_alignmentAndrew Jiang2017-12-061-1/+0Star
| | | | | | | | | Also initialize this to 64 for all ASICs. Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Added Opp and Diags Interface for P to IArun Pandey2017-12-065-43/+29Star
| | | | | | | Signed-off-by: Arun Pandey <Arun.Pandey@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Optimize programming front endYongqiang Sun2017-12-061-23/+19Star
| | | | | | | | | | In case of update type is medium, optimize squence, reduce programing time. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Apply work around for stutter.Yongqiang Sun2017-12-062-87/+67Star
| | | | | | | | | | Power on one plane after disable all the planes, for a hw bug work around to resolve stutter efficiency issue. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: remove dcn10 wait on tg unlockDmytro Laktyushkin2017-12-061-5/+0Star
| | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Report pitch_alignment for DCNAndrew Jiang2017-12-061-1/+1
| | | | | | | Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: A few more color indentation changesHarry Wentland2017-12-063-92/+52Star
| | | | | | | Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Remove extra arr_points elementHarry Wentland2017-12-061-7/+0Star
| | | | | | | | | | | arr_points[1] and [2] were duplicated. Remove the extra one. If we ever need more points we can add them but the current state of affairs is confusing. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: always call set output tfEric Yang2017-12-061-1/+7
| | | | | | | | | | Temporary solution to fix gamma adjustment not working. Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fixed not set scaler bug.Yongqiang Sun2017-12-061-1/+3
| | | | | | | | | | New scaler parameter assign to dpp is after early return, cause next flip scaler not program. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: fix dcn10_hubbub_wm_read_stateKen Chalmers2017-12-061-8/+18
| | | | | | | | | The ALLOW_SR registers might not always be available. Signed-off-by: Ken Chalmers <ken.chalmers@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: send display_count msg so SMU can enter S0i2Hersen Wu2017-12-061-0/+2
| | | | | | | | | | | | | | | | SMU can future lower voltages in long idle case when all display is off. If all display output is turned off via DPMS, send display_count = 0 after all output are turned off. otherwise send display_count msg before turning on display to make sure SMU exit S0i2 state. before is not neccessary as we are out of S0i2 when driver execute code, but send message before anyways for correctness. Signed-off-by: Hersen Wu <hersenxs.wu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Modified front end initiail in init_hwYongqiang Sun2017-12-063-17/+71
| | | | | | | | | | Optimized front end initial sequence, reset MPC module properly. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: remove unnecessary waits in dcn10Dmytro Laktyushkin2017-12-062-23/+3Star
| | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: fix uninitialized variable warningDmytro Laktyushkin2017-12-061-1/+1
| | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: fix regamma programmingDmytro Laktyushkin2017-12-063-14/+3Star
| | | | | | | | | | | | When new coefficients match cached we would skip setting regamma mode Also, when doing a stream update we would program regamma for all pipes, even thos that are not yet powered on. This resulted in never setting regamma since we would cache before the pipe is powered. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix some more color indentationsHarry Wentland2017-12-061-28/+16Star
| | | | | | | Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Refactor disable front end pipes.Yongqiang Sun2017-12-061-129/+133
| | | | | | | | | | | | There are different code to disable front end, it is difficult to debug and adding new process. This refactor makes all disable front end call the same functions. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: renaming dpp function to follow naming conventionYue Hin Lau2017-12-062-28/+29
| | | | | | | Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Yuehin Lau <Yuehin.Lau@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: call set csc_default if enable adjustment is falseYue Hin Lau2017-12-063-5/+5
| | | | | | | Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add OPP DPG blank functionEric Bernstein2017-12-062-62/+45Star
| | | | | | | | | | Added a function to blank data using OPP DPG. Clean up code to prepare for pseudocode review with HW. Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: cache pwl params and scl_data to avoid extra programmingDmytro Laktyushkin2017-12-064-33/+27Star
| | | | | | | | | | This saves us about 5000 reg writes per full update. This translates to about 40000 writes over the course of single eDP bootup. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Don't use dc_link in link_encoderAndrew Jiang2017-12-061-0/+3
| | | | | | | | | | | dc_link is at a higher level than link_encoder, and we only want higher-level components to be able to access lower-level ones, not the other way around. Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add tg_init interface.Yongqiang Sun2017-12-063-1/+13
| | | | | | | | | Clear OPTC underflow status when init_hw. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Enalbe blank data double buffer after mpc disconnected.Yongqiang Sun2017-12-061-5/+14
| | | | | | | Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Only update dchub if hubbub is availableYue Hin Lau2017-12-061-1/+2
| | | | | | | Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Call ipp_program_bias_and_scale only if availableEric Bernstein2017-12-062-9/+10
| | | | | | | | | Also move some register definitions to common DCN regs. Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: hubbub function flipping true and falseYue Hin Lau2017-12-062-3/+3
| | | | | | | | | no logic change Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: function renaming for hubbubYue Hin Lau2017-12-063-37/+43
| | | | | | | | | following the naming convention with correct prefix Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: create new function prototype update_dchub for dcnYue Hin Lau2017-12-062-2/+6
| | | | | | | | | dcn version of update_dchub now uses hubbub instead of hwseq Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Multi display synchronization logicMikita Lipski2017-12-062-9/+86
| | | | | | | | | | | | | | | | | | | | | | | This feature synchronizes multiple displays with various timings to a display with the highest refresh rate it is enabled if edid caps flag multi_display_sync is set to one There are limitations on refresh rates allowed that can be synchronized. That would prevent from underflow and other potential corruptions. Multi display synchronization is using the same functions as timing_sync in order to minimize redunduncy and decision to disable synchronization is based on trigger parametre set in DM Feature is developed for DCN1 and DCE11 Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Mikita Lipski <Mikita.Lipski@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: fix bug from last commit for hubbubYue Hin Lau2017-12-041-1/+7
| | | | | | | | | fix memory leak Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Move hdr_metadata from plane to streamAnthony Koo2017-12-041-2/+1Star
| | | | | | | | | | | | Need to move HDR Metadata from Surface to Stream since there is only one infoframe possible per stream. Also cleaning up some duplicate definitions. Signed-off-by: Anthony Koo <anthony.koo@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-10-27 00:51:47 +0200