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path: root/drivers/gpu/drm/i915/i915_irq.c
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* drm/i915/gen8+: Do not enable DPF interrupt since the handler does not existTvrtko Ursulin2016-04-201-1/+3
* drm/i915: Split gen8_gt_irq_handler into ack+handleVille Syrjälä2016-04-141-32/+47
* drm/i915: Eliminate passing dev+dev_priv to {snb,ilk}_gt_irq_handler()Ville Syrjälä2016-04-141-15/+12Star
* drm/i915: Move gt/pm irq handling out from irq disabled section on VLVVille Syrjälä2016-04-141-5/+5
* drm/i915: Split VLV/CVH PIPESTAT handling into ack+handlerVille Syrjälä2016-04-141-4/+17
* drm/i915: Split PORT_HOTPLUG_STAT ack out from i9xx_hpd_irq_handler()Ville Syrjälä2016-04-141-17/+30
* drm/i915: Move variables to narrower scope in VLV/CHV irq handlersVille Syrjälä2016-04-141-2/+2
* drm/i915: Eliminate loop from VLV irq handlerVille Syrjälä2016-04-141-4/+3Star
* drm/i915: Clear VLV_IER around irq processingVille Syrjälä2016-04-141-1/+35
* drm/i915: Clear VLV_MASTER_IER around irq processingVille Syrjälä2016-04-141-6/+10
* drm/i915: Clear VLV_IIR after PIPESTATVille Syrjälä2016-04-141-15/+21
* drm/i915: Set up VLV_MASTER_IER consistentlyVille Syrjälä2016-04-141-0/+5
* drm/i915: Use GEN8_MASTER_IRQ_CONTROL consistentlyVille Syrjälä2016-04-141-3/+3
* drm/i915: Tighten reset_counter for reset statusChris Wilson2016-04-141-19/+2Star
* drm/i915: Hide the atomic_read(reset_counter) behind a helperChris Wilson2016-04-141-1/+1
* drm/i915: Move DPINVGTT setup to vlv_display_irq_reset()Ville Syrjälä2016-04-121-10/+5Star
* drm/i915: Warn if irq_mask isn't ~0 during vlv/cvh display irq postinstallVille Syrjälä2016-04-121-0/+3
* drm/i915: Use GEN5_IRQ_INIT() in vlv_display_irq_postinstall()Ville Syrjälä2016-04-121-12/+8Star
* drm/i915: Clear display interrupt before enabling when turning on the power wellVille Syrjälä2016-04-121-8/+3Star
* drm/i915: Move vlv/chv display irq code to a more logical placeVille Syrjälä2016-04-121-51/+51
* drm/i915: Skip display irq setup if display irqs aren't flagged as enabledVille Syrjälä2016-04-121-6/+12
* drm/i915: Fix up vlv/chv display irq setupVille Syrjälä2016-04-121-80/+29Star
* drm/i915: Remove "VLV magic" from irq setupVille Syrjälä2016-04-121-6/+0Star
* drm/i915: Harden detection of missed interruptsChris Wilson2016-04-091-12/+26
* drm/i915: Separate out the seqno-barrier from engine->get_seqnoChris Wilson2016-04-091-2/+12
* drm/i915: Simplify check for idleness in hangcheckChris Wilson2016-04-081-3/+2Star
* drm/i915: Apply a mb between emitting the request and hangcheckChris Wilson2016-04-081-1/+2
* drm/i915: Do not use {HAS_*, IS_*, INTEL_INFO}(dev_priv->dev)Joonas Lahtinen2016-04-071-4/+4
* drm/i915: Set invert bit for hpd based on VBTShubhangi Shrivastava2016-04-061-0/+20
* drm/i915: Move execlists irq handler to a bottom halfTvrtko Ursulin2016-04-041-1/+1
* drm/i915: Exit cherryview_irq_handler() after one passChris Wilson2016-03-301-2/+2
* drm/i915: replace for_each_engine()Dave Gordon2016-03-241-9/+5Star
* drm/i915: introduce for_each_engine_id()Dave Gordon2016-03-241-5/+5
* drm/i915/tdr: Prepare error handler to accept mask of hung enginesarun.siluvery@linux.intel.com2016-03-221-8/+8
* drm/i915: Move load time IRQ SW init earlierImre Deak2016-03-171-2/+0Star
* drm/i915: More renaming of rings to enginesTvrtko Ursulin2016-03-161-1/+1
* drm/i915: More intel_engine_cs renamingTvrtko Ursulin2016-03-161-10/+10
* drm/i915: Rename intel_engine_cs struct membersTvrtko Ursulin2016-03-161-20/+20
* drm/i915: Rename intel_engine_cs function parametersTvrtko Ursulin2016-03-161-55/+56
* drm/i915: Rename local struct intel_engine_cs variablesTvrtko Ursulin2016-03-161-42/+42
* drm/i915/hangcheck: Prevent long walks across full-ppgttMika Kuoppala2016-03-041-10/+7Star
* drm/i915: Add for_each_pipe_masked()Ville Syrjälä2016-02-221-18/+9Star
* drm/i915: Make sure pipe interrupts are processed before turning off power we...Ville Syrjälä2016-02-221-0/+16
* drm/i915: Skip PIPESTAT reads from irq handler on VLV/CHV when power well is ...Ville Syrjälä2016-02-221-0/+6
* drm/i915/gen8: Factor out display interrupt handlingTvrtko Ursulin2016-01-131-22/+31
* drm/i915/gen8: Tidy display interrupt processingTvrtko Ursulin2016-01-131-64/+67
* drm/i915: Do one shot unclaimed mmio detection less frequentlyMika Kuoppala2016-01-081-5/+6
* drm/i915: Introduce intel_uncore_unclaimed_mmioMika Kuoppala2016-01-081-1/+2
* drm/i915: Inspect subunit states on hangcheckMika Kuoppala2016-01-081-5/+57
* drm/i915: shut up gen8+ SDE irq dmesg noise, againJani Nikula2016-01-071-3/+7
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