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path: root/drivers/gpu/drm/i915/intel_pm.c
Commit message (Expand)AuthorAgeFilesLines
* Partially revert "drm/i915: s/mdelay/msleep/" in ilk rps codeDaniel Vetter2015-07-201-3/+3
* drm/i915: Fix divide by zero on watermark updateMika Kuoppala2015-07-171-1/+3
* drm/i915/gen9: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaroundArun Siluvery2015-07-151-0/+3
* drm/i915/gen9: Implement WaDisableKillLogic for gen 9Nick Hoath2015-07-151-0/+4
* drm/i915: Add HAS_CORE_RING_FREQ macroAkash Goel2015-07-141-1/+1
* drm/i915/skl: Restrict the ring frequency table programming to SKLAkash Goel2015-07-141-1/+2
* drm/i915: Update PM interrupts before updating the freqDeepak S2015-07-131-2/+2
* drm/i915/skl: Ring frequency table programming changesAkash Goel2015-07-131-4/+19
* drm/i915/skl: Retrieve the Rpe value from PcodeAkash Goel2015-07-131-8/+11
* drm/i915: use dev_priv for the FBC functionsPaulo Zanoni2015-07-081-1/+3
* drm/i915: s/mdelay/msleep/Daniel Vetter2015-07-071-3/+3
* drm/i915: Zero unused WM1 watermarks on VLV/CHVVille Syrjälä2015-06-291-0/+6
* drm/i915: Don't do PM5/DDR DVFS with multiple pipesVille Syrjälä2015-06-291-0/+3
* drm/i915: Try to make sure cxsr is disabled around plane enable/disableVille Syrjälä2015-06-291-7/+4Star
* drm/i915: Use the memory latency based WM computation on VLV tooVille Syrjälä2015-06-291-218/+5Star
* drm/i915: Compute display FIFO split dynamically for CHVVille Syrjälä2015-06-291-10/+165
* drm/i915: CHV DDR DVFS support and another watermark rewriteVille Syrjälä2015-06-291-6/+312
* drm/i915: Read wm values from hardware at init on CHVVille Syrjälä2015-06-291-0/+141
* drm/i915: POSTING_READ() in intel_set_memory_cxsr()Ville Syrjälä2015-06-291-0/+5
* drm/i915: Update rps frequencies for BXTBob Paauwe2015-06-261-4/+12
* drm/i915: Remove more ilk rc6 remnantsDaniel Vetter2015-06-151-10/+2Star
* drm/i915: Don't enable IPS when pixel rate exceeds 95%Ville Syrjälä2015-06-121-9/+8Star
* drm/i915: Use cached cdclk valueVille Syrjälä2015-06-121-1/+1
* Merge tag 'v4.1-rc6' into drm-nextDave Airlie2015-06-041-13/+11Star
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| * drm/i915: fix screen flickeringThomas Gummerer2015-05-191-13/+11Star
* | drm/i915: s/dpio_lock/sb_lock/Ville Syrjälä2015-05-281-2/+2
* | drm/i915: Kill intel_flush_primary_plane()Ville Syrjälä2015-05-281-2/+4
* | drm/i915: Use spinlocks for checking when to waitboostChris Wilson2015-05-261-11/+20
* | drm/i915: Introduce DRM_I915_THROTTLE_JIFFIESChris Wilson2015-05-221-1/+1
* | drm/i915: Enable GTT caching on gen8Ville Syrjälä2015-05-221-0/+13
* | drm/i915: Move WaProgramL3SqcReg1Default:bdw to init_clock_gating()Ville Syrjälä2015-05-221-0/+10
* | drm/i915: Use ilk_init_lp_watermarks() on BDWVille Syrjälä2015-05-221-3/+1Star
* | drm/i915: Free RPS boosts for all laggardsChris Wilson2015-05-211-4/+16
* | drm/i915: Convert RPS tracking to a intel_rps_client structChris Wilson2015-05-211-7/+7
* | drm/i915: Limit mmio flip RPS boostsChris Wilson2015-05-211-0/+1
* | drm/i915: Limit ring synchronisation (sw sempahores) RPS boostsChris Wilson2015-05-211-0/+1
* | drm/i915: s/\<rq\>/req/gDaniel Vetter2015-05-211-8/+8
* | drm/i915/chv: Set min freq to efficient frequency on chvDeepak S2015-05-201-19/+2Star
* | drm/i915/chv: Extend set idle rps wa to chvDeepak S2015-05-201-7/+0Star
* | drm/i915/vlv: Remove wait for for punit to updates freq.Deepak S2015-05-201-30/+11Star
* | drm/i915: Be optimistic about future display engines having 7 WM levelsDamien Lespiau2015-05-201-1/+1
* | drm/i915: Adding dbuf support for skl nv12 format.Chandra Konduru2015-05-201-12/+67
* | drm/i915/skl: Fix WaDisableChickenBitTSGBarrierAckForFFSliceCSDamien Lespiau2015-05-081-2/+1Star
* | drm/i915: s/9/intel_freq_opcode(450)/Ville Syrjälä2015-05-081-2/+2
* | drm/i915: Setup static bias for GPUDeepak S2015-05-081-0/+12
* | drm/i915: Re-adjusting rc6 promotional timer for chvDeepak S2015-04-161-2/+2
* | Merge branch 'topic/bxt-stage1' into drm-intel-next-queuedDaniel Vetter2015-04-141-2/+31
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| * | drm/i915/bxt: add workaround to avoid PTE corruptionRobert Beckett2015-04-141-0/+2
| * | drm/i915/bxt: add GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ workaroundBen Widawsky2015-04-141-1/+3
| * | drm/i915/bxt: add GEN8_SDEUNIT_CLOCK_GATE_DISABLE workaroundImre Deak2015-04-141-0/+11
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